公开(公告)号：EP3404660A1

公开(公告)日：2018-11-21

申请号：EP18179414.0

申请日：2010-07-01

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  BHAKTA, Jayesh R.

IPC分类号： G11C5/02 ,  G11C5/06

CPC分类号： G06F12/00 ,  G11C5/025 ,  G11C5/04 ,  G11C5/066 ,  G11C8/12

摘要： A memory system and method utilizing one or more memory modules is provided. The memory module (400) includes a plurality of memory devices (412) and a controller (430) configured to receive control information (440) from a system memory controller (420) and to produce module control signals (442). The memory module further includes a plurality of circuits, for example byte-wise buffers (416), which are configured to selectively isolate the plurality of memory devices from the system memory controller. The circuits are operable, in response to the module control signals, to drive write data from the system memory controller to the plurality of memory devices and to merge read data from the plurality of memory devices to the system memory controller. The circuits are distributed at corresponding positions separate from one another.
Fig. 3A

公开(公告)号：EP3985518A1

公开(公告)日：2022-04-20

申请号：EP21200871.8

申请日：2012-07-28

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  CHEN, Chi-She ,  SOLOMON, Jeffrey C. ,  MILTON, Scott ,  BHAKTA, Jayesh

IPC分类号： G06F12/02 ,  G06F3/06 ,  G06F13/16 ,  G06F12/06 ,  G06F13/40 ,  G06F13/42 ,  G06F13/28 ,  G06F1/18 ,  G11C11/00 ,  G11C11/409 ,  G11C16/10

摘要： A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem (506), a data manager (DMgr) coupled to the non-volatile memory subsystem (508), a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller (502) operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.

公开(公告)号：EP3469480A1

公开(公告)日：2019-04-17

申请号：EP17790291.3

申请日：2017-04-25

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  RYU, Junkil

IPC分类号： G06F9/455 ,  G06F9/50 ,  G06F12/06 ,  G06F13/00 ,  H04L29/08

公开(公告)号：EP3066570A2

公开(公告)日：2016-09-14

申请号：EP14860330.1

申请日：2014-11-07

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  BHAKTA, Jayesh, R. ,  CHEN, Chi, She ,  SOLOMON, Jeffery, C. ,  MARTINEZ, Mario, Jesus ,  LE, Hao ,  CHOI, Soon, J.

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F11/1004 ,  G06F11/108 ,  G06F12/0868 ,  G06F2212/1032 ,  G06F2212/214 ,  G06F2212/313

摘要： A memory module comprises a volatile memory subsystem configured to coupled to a memory channel in computer system and capable of serving as main memory for the computer system, a non- volatile memory subsystem providing storage for the computer system, and a module controller coupled to the volatile memory subsystem, the non- volatile memory subsystem, and the C/A bus. The module controller is configured to control intra- module data transfers between the volatile memory subsystem and the non- volatile memory subsystem. The module controller is further configured to monitor C/A signals on the C/A bus and schedule the intra-module data transfers in accordance with the C/A signals so that the intra-module data transfers do not conflict with accesses to the volatile memory subsystem by the memory controller.

摘要翻译： 存储器模块包括被配置为耦合到计算机系统中的存储器通道并且能够用作计算机系统的主存储器的非易失性存储器子系统，为计算机系统提供存储的非易失性存储器子系统以及耦合到该存储器系统的模块控制器 易失性存储器子系统，非易失性存储器子系统和C / A总线。 模块控制器被配置为控制易失性存储器子系统和非易失性存储器子系统之间的模块内数据传输。 模块控制器还被配置为监视C / A总线上的C / A信号，并根据C / A信号调度模块内数据传输，使得模块内数据传输不与对易失性的访问冲突 内存子系统由内存控制器。

公开(公告)号：EP3028153B1

公开(公告)日：2019-03-06

申请号：EP14831654.0

申请日：2014-07-28

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  BHAKTA, Jayesh R.

IPC分类号： G06F12/02 ,  G11C5/04 ,  G06F13/16 ,  G11C7/10

公开(公告)号：EP2737383B1

公开(公告)日：2017-09-20

申请号：EP12817751.6

申请日：2012-07-28

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  CHEN, Chi-She ,  SOLOMON, Jeffrey, C. ,  MILTON, Scott ,  BHAKTA, Jayesh

IPC分类号： G06F12/02 ,  G06F13/16 ,  G06F1/18 ,  G06F13/42 ,  G06F13/28

CPC分类号： G06F13/28 ,  G06F1/185 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0685 ,  G06F12/0246 ,  G06F12/0638 ,  G06F13/1694 ,  G06F13/4027 ,  G06F13/4243 ,  G06F2212/205 ,  G06F2212/7208 ,  G11C7/1072 ,  G11C14/0018

摘要： A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem (506), a data manager (DMgr) coupled to the non-volatile memory subsystem (508), a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller (502) operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.

摘要翻译： 可耦合到主机系统的存储器控​​制器集线器（MCH）的存储器模块包括非易失性存储器子系统，耦合到非易失性存储器子系统的数据管理器，耦合到数据管理器的易失性存储器子系统， 通过所述数据管理器与所述非易失性存储器子系统交换数据，以及控制器，所述控制器可操作以从所述MCH接收读取/写入命令，并且在所述MCH，所述易失性存储器子系统和所述MCH中的任意两个或更多个之间 基于这些命令的非易失性存储器子系统。

公开(公告)号：EP3028153A1

公开(公告)日：2016-06-08

申请号：EP14831654.0

申请日：2014-07-28

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  BHAKTA, Jayesh R.

IPC分类号： G06F12/02 ,  G06F13/38 ,  G06F13/42

CPC分类号： G06F12/0802 ,  G11C5/04 ,  G11C7/1066 ,  G11C7/1093 ,  G11C29/023 ,  G11C29/028

摘要： A memory module is operatable in a memory system with a memory controller. The memory module comprises a module control device to receive command signals from the memory controller and to output module C/A signals and data buffer control signals. The module C/A signals are provided to memory devices organized in groups, each group including at least one memory device, while the data buffer control signals are provided to a plurality of buffer circuits to control data paths in the buffer circuits, a respective buffer circuit corresponding to a respective group of memory devices. The plurality of buffer circuits are distributed across a surface of the memory module such that each data buffer control signal arrives at the plurality of buffer circuits at different points in time. The plurality of buffer circuits include clock regeneration circuits to regenerate a clock signal received from the module control device and to provide regenerated clock signals to respective groups of memory devices.

摘要翻译： 存储器模块可在具有存储器控制器的存储器系统中操作。 存储模块包括一个模块控制装置，用于从存储器控制器接收命令信号并输出​​模块C / A信号和数据缓冲器控制信号。 将模块C / A信号提供给以组为单位组织的存储器件，每组包括至少一个存储器件，而数据缓冲器控制信号被提供给多个缓冲器电路以控制缓冲器电路中的数据路径，相应的缓冲器 电路对应于相应的存储器组组。 多个缓冲电路分布在存储器模块的表面上，使得每个数据缓冲器控制信号在不同的时间点到达多个缓冲器电路。 多个缓冲电路包括时钟再生电路，用于再生从模块控制装置接收的时钟信号，并将再生的时钟信号提供给各组存储器件。 33

公开(公告)号：EP2737383A2

公开(公告)日：2014-06-04

申请号：EP12817751.6

申请日：2012-07-28

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  CHEN, Chi-She ,  SOLOMON, Jeffrey, C. ,  MILTON, Scott ,  BHAKTA, Jayesh

IPC分类号： G06F1/16

CPC分类号： G06F13/28 ,  G06F1/185 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0685 ,  G06F12/0246 ,  G06F12/0638 ,  G06F13/1694 ,  G06F13/4027 ,  G06F13/4243 ,  G06F2212/205 ,  G06F2212/7208 ,  G11C7/1072 ,  G11C14/0018

摘要： A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem (506), a data manager (DMgr) coupled to the non-volatile memory subsystem (508), a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller (502) operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.

摘要翻译： 可耦合到主机系统的存储器控​​制器集线器（MCH）的存储器模块包括非易失性存储器子系统，耦合到非易失性存储器子系统的数据管理器，耦合到数据管理器的易失性存储器子系统， 通过所述数据管理器与所述非易失性存储器子系统交换数据，以及控制器，所述控制器可操作以接收来自所述MCH的读取/写入命令并且引导所述MCH，所述易失性存储器子系统和所述MCH中的任何两个或更多个之间的数据传输。 非易失性存储器子系统基于这些命令。

公开(公告)号：EP3293638A1

公开(公告)日：2018-03-14

申请号：EP17191878.2

申请日：2012-07-28

申请人： Netlist, Inc.

发明人： LEE, Hyun ,  CHEN, Chi-She ,  SOLOMON, Jeffrey, C. ,  MILTON, Scott ,  BHAKTA, Jayesh

IPC分类号： G06F12/02 ,  G06F3/06 ,  G06F13/16 ,  G06F12/06 ,  G06F13/40 ,  G06F13/42 ,  G06F13/28 ,  G06F1/18 ,  G11C7/10 ,  G11C14/00

CPC分类号： G06F13/28 ,  G06F1/185 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0685 ,  G06F12/0246 ,  G06F12/0638 ,  G06F13/1694 ,  G06F13/4027 ,  G06F13/4243 ,  G06F2212/205 ,  G06F2212/7208 ,  G11C7/1072 ,  G11C14/0018

摘要： A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem (506), a data manager (DMgr) coupled to the non-volatile memory subsystem (508), a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller (502) operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.

摘要翻译： 可耦合到主机系统的存储器控​​制器集线器（MCH）的存储器模块包括非易失性存储器子系统（506），耦合到非易失性存储器子系统（508）的数据管理器（DMgr），易失性存储器 子系统，其耦合到所述数据管理器且可操作以经由所述数据管理器与所述非易失性存储器子系统交换数据;以及控制器（502），其可操作以从所述MCH接收读取/写入命令且指导在任何两个 或更多的MCH，易失性存储器子系统和基于命令的非易失性存储器子系统。