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    DUAL MODE TRANSISTOR
    2.
    发明授权
    DUAL MODE TRANSISTOR 有权

    公开(公告)号：EP3075010B1

    公开(公告)日：2018-01-10

    申请号：EP14815124

    申请日：2014-11-13

    申请人： QUALCOMM INC

    发明人： LI XIA ,  KIM DAEIK DANIEL ,  YANG BIN ,  KIM JONGHAE ,  PERRY DANIEL WAYNE

    IPC分类号： H01L27/07 ,  G05F3/16 ,  H01L29/739

    CPC分类号： H01L29/7393 ,  G05F3/16 ,  H01L27/0705

    摘要： A method includes biasing a first gate voltage to enable unipolar current to flow from a first region of a transistor to a second region of the transistor according to a field-effect transistor (FET)-type operation. The method also includes biasing a body terminal to enable bipolar current to flow from the first region to the second region according to a bipolar junction transistor (BJT)-type operation. The unipolar current flows concurrently with the bipolar current to provide dual mode digital and analog device in complementary metal oxide semiconductor (CMOS) technology.

    METHOD AND APPARATUS FOR PROVIDING THROUGH SILICON VIA (TSV) REDUNDANCY
    3.
    发明公开
    METHOD AND APPARATUS FOR PROVIDING THROUGH SILICON VIA (TSV) REDUNDANCY 审中-公开
    方法和设备提供冗余SILICIUMDURCHKONTAKTIERUNGEN

    公开(公告)号：EP2433301A4

    公开(公告)日：2017-05-03

    申请号：EP10778410

    申请日：2010-05-20

    申请人： QUALCOMM INC

    发明人： KIM JONGHAE ,  WANG FENG ,  NOWAK MATTHEW

    IPC分类号： H01L21/768 ,  G01R31/3185 ,  H01L21/3205 ,  H01L23/48 ,  H01L25/065 ,  H03K19/003

    CPC分类号： H03K19/00392 ,  G01R31/318513 ,  H01L23/481 ,  H01L25/0657 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06596 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An apparatus includes a first die having a first bus, a second die having a second bus stacked on the first die, a plurality of through silicon vias connecting the first bus to the second bus, and first control logic for sending data to identified ones of the plurality of through silicon vias. Also, optionally, second control logic for determining a first set of the plurality of through silicon vias that are nonfunctional, wherein the second control logic is configured to send information to the first control logic identifying the first set of the plurality of through silicon vias or identifying a second set of through silicon vias that are functional. Also a method of sending signals through a plurality of through silicon vias.

    摘要翻译： 一种装置，包括：第一所述具有第一总线，第二的具有堆叠在第一第二总线，其穿硅通孔的多个所述第一总线连接到所述第二总线，以及第一控制逻辑，其用于将数据发送到的那些鉴定 的穿硅通孔的多元性。 这样，可选地，对于确定的采矿第二控制逻辑的第一组的穿硅通孔没有被非功能性，worin第二控制逻辑被配置为将信息发送到所述第一控制逻辑识别穿硅通孔的第一组的多个所述多个或 识别第二组的穿硅通孔做是有功能的。 所以穿硅通孔通过的多个发送信号的方法。