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公开(公告)号:EP3714406A1
公开(公告)日:2020-09-30
申请号:EP19764062.6
申请日:2019-03-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: PARK, Younghwan , KIM, Kyounghoon , SUH, Dongkwan , CHO, Hansu , PRASADNAGARAJA, Keshava , KIM, Sukjin , KIM, Hyunjung
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公开(公告)号:EP4002448A1
公开(公告)日:2022-05-25
申请号:EP21168089.7
申请日:2021-04-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: PARK, Younghwan , KIM, Jongseob , OH, Jaejoon , CHONG, Soogine , HWANG, Sunkyu
IPC: H01L23/495 , H01L23/31
Abstract: Provided are a semiconductor device package and/or a method of fabricating the semiconductor device package. The semiconductor device package may include a semiconductor device including a plurality of electrode pads on an upper surface of the semiconductor device, a lead frame including a plurality of conductive members bonded to the plurality of electrode pads, and a mold between the plurality of conductive members.
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公开(公告)号:EP4216288A1
公开(公告)日:2023-07-26
申请号:EP22206590.6
申请日:2022-11-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: PARK, Younghwan , KIM, Joosung , SHIN, Dongchul , CHOI, Junhee
Abstract: Provided are nanorod light emitting diodes (LEDs), display apparatuses, and manufacturing methods thereof. The nanorod LED includes a first-type semiconductor layer including a body and a pyramidal structure continuously provided from the body, a nitride light emitting layer provided on the pyramidal structure, and a second-type semiconductor layer provided in the nitride light emitting layer.
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公开(公告)号:EP3846223A2
公开(公告)日:2021-07-07
申请号:EP20210064.0
申请日:2020-11-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: CHONG, Soogine , KIM, Jongseob , KIM, Joonyong , PARK, Younghwan , PARK, Junhyuk , SHIN, Dongchul , OH, Jaejoon , HWANG, Sunkyu , HWANG, Injun
IPC: H01L29/778 , H01L21/337 , H01L29/423 , H01L29/40 , H01L29/10 , H01L29/20
Abstract: A semiconductor device includes a channel layer (110) including a channel; a channel supply layer (120) on the channel layer; a channel separation pattern (200) on the channel supply layer; a gate electrode pattern (310) on the channel separation pattern; and an electric-field relaxation pattern (320) protruding from a first lateral surface of the gate electrode pattern in a first direction parallel with an upper surface of the channel layer. An interface between the channel layer and the channel supply layer is adjacent to channel. A size of the gate electrode pattern in the first direction is different from a size of the channel separation pattern in the first direction. The gate electrode pattern and the electric-field relaxation pattern form a single structure.
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公开(公告)号:EP3809449A1
公开(公告)日:2021-04-21
申请号:EP20177054.2
申请日:2020-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: PARK, Younghwan , KIM, Jongseob , KIM, Joonyong , PARK, Junhyuk , Shin, Dongchul , Oh, Jaejoon , Chong, Soogine , Hwang, Sunkyu , Hwang, Injun
Abstract: A semiconductor thin film structure may include a substrate, a buffer layer on the substrate, and a semiconductor layer on the buffer layer, such that the buffer layer is between the semiconductor layer and the substrate. The buffer layer may include a plurality of unit layers. Each unit layer of the plurality of unit layers may include a first layer having first bandgap energy and a first thickness, a second layer having second bandgap energy and a second thickness, and a third layer having third bandgap energy and a third thickness. One layer having a lowest bandgap energy of the first, second, and third layers of the unit layer may be between another two layers of the first, second, and third layers of the unit layer.
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公开(公告)号:EP4318614A1
公开(公告)日:2024-02-07
申请号:EP22213872.9
申请日:2022-12-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: PARK, Jinjoo , KIM, Joosung , PARK, Younghwan , SHIN, Dongchul
Abstract: A light-emitting device includes a base semiconductor layer, a three-dimensional (3D) light-emitting structure, and a flat light-emitting structure formed in a flat shape, wherein the flat light-emitting structure generates light having a different wavelength than that of the 3D light-emitting structure. A strain-relieving layer relieving lattice mismatch between the base semiconductor layer and the flat light-emitting structure may be arranged on the base semiconductor layer in an area in which at least the flat light-emitting structure is formed.
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7.
公开(公告)号:EP4312273A1
公开(公告)日:2024-01-31
申请号:EP23167342.7
申请日:2023-04-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: CHOI, Junhee , KONG, Kiho , KIM, Joosung , PARK, Younghwan , PARK, Jinjoo , SHIN, Dongchul
Abstract: A light emitting structure includes: a substrate; a first epitaxial structure disposed on the substrate; a second epitaxial structure disposed on the first epitaxial structure; and a third epitaxial structure disposed on the second epitaxial structure. Each of the first epitaxial structure, the second epitaxial structure, and the third epitaxial structure comprises, in a sequentially stacked structure, a first semiconductor layer of a first conductivity, a carrier blocking layer, an active layer, and a second semiconductor layer of a second conductivity.
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8.
公开(公告)号:EP4109568A1
公开(公告)日:2022-12-28
申请号:EP22178144.6
申请日:2022-06-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: KIM, Joosung , PARK, Younghwan , SHIN, Dongchul , CHOI, Junhee , KIM, Nakhyun , PARK, Junghun , LEE, Eunsung , HAN, Joohun
Abstract: A light emitting device may be a bar-type light emitting device and include a n-GaN semiconductor layer, a p-GaN semiconductor layer spaced apart from the n-GaN semiconductor layer, an active layer arranged between the n-GaN semiconductor layer and the p-GaN semiconductor layer, and a strain relaxing layer including indium clusters and voids.
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公开(公告)号:EP4089732A1
公开(公告)日:2022-11-16
申请号:EP21196944.9
申请日:2021-09-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: HWANG, Sunkyu , KIM, Jongseob , KIM, Joonyong , PARK, Younghwan , PARK, Junhyuk , OH, Jaejoon , HWANG, Injun
IPC: H01L27/085 , H01L29/10 , H01L29/778 , H01L21/8252 , H01L27/06 , H01L27/098
Abstract: A semiconductor integrated circuit device includes: a channel layer (20); a barrier layer (30); a first p-type semiconductor layer (41) and a second p-type semiconductor layer (42), spaced apart from each other on the barrier layer; and a passivation layer (80) on the first p-type semiconductor layer and the second p-type semiconductor layer. The passivation layer partially inactivates a dopant of at least one of the first p-type semiconductor layer and the second p-type semiconductor layer.
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10.
公开(公告)号:EP3826071A1
公开(公告)日:2021-05-26
申请号:EP20175477.7
申请日:2020-05-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: PARK, Younghwan , KIM, Jongseob
Abstract: A semiconductor structure includes a substrate; at least one mask layer spaced apart from the substrate in a first direction; a first semiconductor region of a first conductivity type between the substrate and the at least one mask layer; a second semiconductor region of a second conductivity type on the at least one mask layer; and a third semiconductor region of the first conductivity type on the first semiconductor region. The third semiconductor region may contact the second semiconductor region to form a PN-junction structure in a second direction different from the first direction. The semiconductor structure may be applied to vertical power devices and may be capable of increasing withstand voltage performance and lowering an on-resistance.
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