-
公开(公告)号：EP3248194A1
公开(公告)日：2017-11-29
申请号：EP15805085.6
申请日：2015-11-25
CPC分类号： G11C16/14 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/3431 , G11C16/349 , G11C2211/5648 , G11C2216/24
摘要： A non-volatile memory system utilizes partial block erasing during program operations to mitigate the effects of programming pass voltage disturbances. A programming request is received that is associated with a group of word lines from a block, such as all or a portion of the word lines. The system erases and soft programs the block prior to beginning programming. The system programs a subset of the word lines of the block for the programming request. After programming the subset of word lines, the system pauses the programming operation and performs an erase operation for the unprogrammed word lines of the block. The already programmed word lines and one or more optional buffer word lines may be inhibited from erasing during the erase operation. After erasing the unprogrammed word lines, the system completes the programming request by programming the remaining user data in the unprogrammed region of the block.
-
2.发明公开
公开(公告)号：EP4055630A1
公开(公告)日：2022-09-14
申请号：EP21889770.0
申请日：2021-06-09
发明人： OGAWA, Hiroyuki , OOWADA, Ken , MUSHIGA, Mitsuteru
IPC分类号： H01L27/11573 , H01L27/11578 , H01L27/11575 , H01L27/11568 , H01L25/065
-
3.发明授权PROGRAMMING SELECT GATE TRANSISTORS AND MEMORY CELLS USING DYNAMIC VERIFY LEVEL 有权编程来选择栅极晶体管和记忆细胞方法的动态考察水平的
公开(公告)号：EP2954529B1
公开(公告)日：2016-11-23
申请号：EP14704492.9
申请日：2014-01-29
发明人： DONG, Yingda , HSU, Cynthia , HIGASHITANI, Masaaki , OOWADA, Ken
CPC分类号： G11C16/3459 , G11C16/0425 , G11C16/3427 , G11C16/3454
-
4.发明公开OPTIMIZING PASS VOLTAGE AND INITIAL PROGRAM VOLTAGE BASED ON PERFORMANCE OF NON-VOLATILE MEMORY 审中-公开基于非挥发性存储器的性能连续性电压与启动编程电压优
公开(公告)号：EP3084770A1
公开(公告)日：2016-10-26
申请号：EP14812386.2
申请日：2014-12-03
发明人： OOWADA, Ken , MURAI, Shota
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/3427
摘要： A programming techniques adaptively sets a pass voltage and an initial program voltage based on a programming speed of a set of memory cells. In one pass of a multi-pass programming operation, a programming speed-indicating program voltage is obtained. For example, this can be a final program voltage or a program voltage at another programming milestone. A pass voltage is determined for another programming pass of the multi-pass programming operation, by providing an adjustment to a reference pass voltage. An initial program voltage is determined for the another programming pass based on an offset from the programming speed-indicating program voltage. The initial program voltage is further adjusted to counteract an effect of the adjustment to a reference pass voltage. The adjustment to the initial program voltage is opposite in polarity and smaller in magnitude than the adjustment to the reference pass voltage.
摘要翻译： 一种编程技术自适应地设置基于一组存储器单元中的编程速度将通过电压和在初始编程电压。 在多遍编程手术之一通，编程速度指示编程电压被获得。 例如，这可以是一个最终编程电压或在另一个编程里程碑的编程电压。 一种合适的电压被确定的开采的多遍编程手术的另一编程遍，通过提供调整到参考电压匹配。 初始编程电压确定性开采基于所述另一编程遍在从编程速度指示程序电压偏移。 初始编程电压被调整为在与参考电压匹配的调整的效果进一步抵消。 调整到初始编程电压在幅值上比调整到基准电压通极性相反和更小。
-
5.发明公开
公开(公告)号：EP3058572A1
公开(公告)日：2016-08-24
申请号：EP14780731.7
申请日：2014-09-22
CPC分类号： G11C16/3459 , G11C7/08 , G11C11/5621 , G11C16/0483 , G11C16/10 , G11C16/12
摘要： Memory cells which have read noise are identified during a programming pass and an amount of programming is increased for noisy memory cells compared to non-noisy cells. The read noise is indicated by a decrease in the threshold voltage of a cell when the cell is repeatedly read. In one approach, during the programming pass, a cell enters a temporary lockout state when it passes a first verify test and is subject to one or more additional verify tests. Data is stored to identify the cell as a noisy cell or a non-noisy cell based on the one or more additional verify tests. Or, the cells are subject to the one or more additional verify tests at the end of the programming pass. In a subsequent programming pass, the noisy cell is programmed using a stricter verify condition. Or, the noisy cell is kept in an erased state.
-
公开(公告)号：EP2912664B1
公开(公告)日：2017-11-22
申请号：EP13786803.0
申请日：2013-10-21
CPC分类号： G11C16/10 , G11C7/12 , G11C11/5628 , G11C16/12 , G11C16/24 , G11C16/3459
-
7.发明授权DYNAMIC ERASE DEPTH FOR IMPROVED ENDURANCE OF NON-VOLATILE MEMORY 有权DYNAMISCHELÖSCHUNGSTIEFEFÜRERHÖHTELEBENSDAUER EINESNICHTFLÜCHTIGENSPEICHERS
公开(公告)号：EP2965319B1
公开(公告)日：2017-04-19
申请号：EP14712103.2
申请日：2014-03-03
CPC分类号： G11C16/14 , G11C11/5628 , G11C11/5635 , G11C16/16 , G11C16/3427 , G11C16/3445 , G11C16/349
-
8.发明授权READ COMPENSATION FOR PARTIALLY PROGRAMMED BLOCKS OF NON-VOLATILE STORAGE 有权READING补偿对于非易失性存储器局部预定积木
公开(公告)号：EP2748819B1
公开(公告)日：2016-07-20
申请号：EP12778148.2
申请日：2012-08-22
发明人： LEE, Dana , OOWADA, Ken
CPC分类号： G11C16/3427 , G11C11/5642
-
公开(公告)号：EP2941773B1
公开(公告)日：2017-04-05
申请号：EP13821341.8
申请日：2013-12-20
发明人： OOWADA, Ken , DUTTA, Deepanshu
CPC分类号： G11C16/14 , G11C11/5635 , G11C16/0483 , G11C16/3418
-
10.发明授权OPTIMIZED ERASE OPERATION FOR NON-VOLATILE MEMORY WITH PARTIALLY PROGRAMMED BLOCK 有权OPTIMIERTERLÖSCHVORGANGFÜRNICHT-FLÜCHTIGESPEICHER MIT TEILWEISE PROGRAMMITEMTEM BLOCK
公开(公告)号：EP2867899B1
公开(公告)日：2017-02-22
申请号：EP13722240.2
申请日：2013-05-02
发明人： DUTTA, Deepanshu , OOWADA, Ken , NISHIMURA, Koichi , DONG, Yingda
CPC分类号： G11C11/5635 , G11C16/16 , G11C16/344
-
-
-
-
-
-
-
-
-
搜索结果
10 条记录 (耗时 0.015 秒)
