-
公开(公告)号：EP2345038B1
公开(公告)日：2016-10-26
申请号：EP09792882.4
申请日：2009-09-23
CPC分类号： G11C16/0483 , G11C11/5628 , G11C16/3418 , G11C16/3454 , G11C2211/5621 , G11C2211/5648
-
2.发明公开
公开(公告)号：EP3058572A1
公开(公告)日：2016-08-24
申请号：EP14780731.7
申请日：2014-09-22
CPC分类号： G11C16/3459 , G11C7/08 , G11C11/5621 , G11C16/0483 , G11C16/10 , G11C16/12
摘要： Memory cells which have read noise are identified during a programming pass and an amount of programming is increased for noisy memory cells compared to non-noisy cells. The read noise is indicated by a decrease in the threshold voltage of a cell when the cell is repeatedly read. In one approach, during the programming pass, a cell enters a temporary lockout state when it passes a first verify test and is subject to one or more additional verify tests. Data is stored to identify the cell as a noisy cell or a non-noisy cell based on the one or more additional verify tests. Or, the cells are subject to the one or more additional verify tests at the end of the programming pass. In a subsequent programming pass, the noisy cell is programmed using a stricter verify condition. Or, the noisy cell is kept in an erased state.
-
公开(公告)号：EP4433892A1
公开(公告)日：2024-09-25
申请号：EP22896267.6
申请日：2022-05-14
发明人： YUAN, Jiahui , DUTTA, Deepanshu
IPC分类号： G06F3/06
CPC分类号： G11C16/0483 , G11C11/5635 , G11C16/3445 , G11C16/24 , G11C11/5628 , G11C16/08 , G11C2211/562120130101 , H10B43/27 , G11C5/025 , G06F12/0246
-
公开(公告)号：EP2912664B1
公开(公告)日：2017-11-22
申请号：EP13786803.0
申请日：2013-10-21
CPC分类号： G11C16/10 , G11C7/12 , G11C11/5628 , G11C16/12 , G11C16/24 , G11C16/3459
-
5.发明授权DYNAMIC ERASE DEPTH FOR IMPROVED ENDURANCE OF NON-VOLATILE MEMORY 有权DYNAMISCHELÖSCHUNGSTIEFEFÜRERHÖHTELEBENSDAUER EINESNICHTFLÜCHTIGENSPEICHERS
公开(公告)号：EP2965319B1
公开(公告)日：2017-04-19
申请号：EP14712103.2
申请日：2014-03-03
CPC分类号： G11C16/14 , G11C11/5628 , G11C11/5635 , G11C16/16 , G11C16/3427 , G11C16/3445 , G11C16/349
-
公开(公告)号：EP4397152A1
公开(公告)日：2024-07-10
申请号：EP22865235.0
申请日：2022-05-08
发明人： YANG, Xiang , DUTTA, Deepanshu
-
7.发明授权
公开(公告)号：EP2758963B1
公开(公告)日：2018-05-02
申请号：EP12762734.7
申请日：2012-09-13
发明人： DUTTA, Deepanshu , LEE, Dana , LUTZE, Jeffrey
CPC分类号： G11C16/04 , G11C11/5642 , G11C16/26 , G11C16/3418 , G11C16/3495 , G11C2211/5644
摘要： Dynamically determining read levels on chip (e.g., memory die) is disclosed herein. One method comprises reading a group of non-volatile storage elements on a memory die at a first set of read levels. Results of the two most recent of the read levels are stored on the memory die. A count of how many of the non-volatile storage elements in the group showed a different result between the reads for the two most recent read levels is determined. The determining is performed on the memory die using the results stored on the memory die. A dynamic read level is determined for distinguishing between a first pair of adjacent data states of the plurality of data states based on the read level when the count reaches a pre-determined criterion. Note that the read level may be dynamically determined on the memory die.
-
公开(公告)号：EP3248194A1
公开(公告)日：2017-11-29
申请号：EP15805085.6
申请日：2015-11-25
CPC分类号： G11C16/14 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/3431 , G11C16/349 , G11C2211/5648 , G11C2216/24
摘要： A non-volatile memory system utilizes partial block erasing during program operations to mitigate the effects of programming pass voltage disturbances. A programming request is received that is associated with a group of word lines from a block, such as all or a portion of the word lines. The system erases and soft programs the block prior to beginning programming. The system programs a subset of the word lines of the block for the programming request. After programming the subset of word lines, the system pauses the programming operation and performs an erase operation for the unprogrammed word lines of the block. The already programmed word lines and one or more optional buffer word lines may be inhibited from erasing during the erase operation. After erasing the unprogrammed word lines, the system completes the programming request by programming the remaining user data in the unprogrammed region of the block.
-
9.发明授权NON-VOLATILE STORAGE NAND STRING SELECT GATE VOLTAGE LOWERED DURING PROGRAMMING 有权编程期间非易失性存储NAND串行选择栅极电压降低
公开(公告)号：EP2929537B1
公开(公告)日：2017-11-08
申请号：EP13798526.3
申请日：2013-11-19
CPC分类号： G11C16/3427 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/12 , G11C16/24
-
10.发明授权
公开(公告)号：EP2504838B1
公开(公告)日：2016-12-21
申请号：EP10785281.6
申请日：2010-11-22
CPC分类号： G11C16/3454 , G11C11/5628 , G11C16/3459 , G11C2211/5621
-
-
-
-
-
-
-
-
-
搜索结果
16 条记录 (耗时 0.014 秒)
