公开(公告)号：EP2034385A2

公开(公告)日：2009-03-11

申请号：EP08252204.6

申请日：2008-06-27

申请人： Sandisk Corporation

发明人： Niizawa, Derek T. ,  Conley, Kevin M. ,  Sheba, Yaron ,  Lee, Jennifer J.

IPC分类号： G06F1/16

CPC分类号： H01H13/83 ,  G06F1/1626 ,  G06F1/169 ,  G06F3/0238 ,  G06F2200/1614 ,  G06F2200/1637 ,  H01H2219/002 ,  H01H2219/016 ,  H01H2219/062 ,  H04M1/22 ,  H04M1/72522 ,  H04M1/72558 ,  H04M2250/12 ,  H04M2250/22

摘要： An electronic device with circuitry operative to change an orientation of an indicator and method for use therewith are disclosed. In one embodiment, an electronic device is provided comprising a display device, a user interface element, an indicator displayed outside of the display device, and circuitry operative to change an orientation of the indicator when the electronic device changes between a first mode of operation and a second mode of operation. Methods for use with such electronic devices and other electronic devices are also provided. Other embodiments are disclosed, and each of the embodiments can be used alone or together in combination.

摘要翻译： 与电路，其可操作的电子装置在使用的指标和方法的取向改变与有游离缺失盘。 在一个，提供了一种包括显示装置，所述显示装置的外部上显示指示器的用户界面元件，和电路，其可操作在所述指示器的取向来改变电子设备的实施例当在第一操作模式之间的电子设备的改变和 操作的第二模式。 因此，提供与搜索电子设备和其他电子设备的使用方法。 其他实施例游离缺失盘，并且每个实施例可以组合单独或一起使用。

公开(公告)号：EP1829042A1

公开(公告)日：2007-09-05

申请号：EP05854420.6

申请日：2005-12-15

申请人： SanDisk Corporation

发明人： Smith, Peter John ,  Conley, Kevin M.

IPC分类号： G11C7/10 ,  G11C16/26 ,  G11C16/10 ,  G06F13/42

CPC分类号： G11C16/10 ,  G11C16/26

摘要： The on-chip copy process is extended so that the data may be copied between two blocks that may be on different chips, different planes on the same chip, or the same plane of the same chip. More specifically, the methods described here provide a single data copying mechanism that allows data to be copied between any two locations in a memory system. An exemplary embodiment uses an EDO-type timing. According to another aspect, selected portions of the relocated data, such as chosen words in a transferred page, can be updated in the controller on the fly. In addition to transferring a data set directly from a read buffer of a source array to a write buffer of a destination array, the data set can concurrently be copied, if desired, into the controller where an error detection and correction operation can be performed on it.

公开(公告)号：EP1624461A3

公开(公告)日：2006-07-12

申请号：EP05077430.6

申请日：2001-09-25

申请人： SanDisk Corporation

发明人： Gongwer, Geoffrey S. ,  Khalid, Shahzad B. ,  Guterman, Daniel C. ,  Simko, Richard ,  Conley, Kevin M.

IPC分类号： G11C11/56 ,  G11C27/00

CPC分类号： G11C16/28 ,  G11C7/06 ,  G11C11/56 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5642 ,  G11C27/005 ,  G11C2211/5621 ,  G11C2211/5634

摘要： The present invention presents several techniques for using writable tracking cells. Multiple tracking cells are provided for each write block of the memory. These cells are re-programmed each time the user cells of the associated write block are written, preferably at the same time, using the same fixed, global reference levels to set the tracking and user cell programmed thresholds. The threshold voltages of the tracking cells are read every time the user cells are read, and these thresholds are used to determine the stored logic levels of the user cells. In one set of embodiments, populations of one or more tracking cells are associated with different logic levels of a multi-state memory. These tracking cell populations may be provided for only a subset of the logic levels. The read points for translating the threshold voltages are derived for all of the logic levels based upon this subset. In one embodiment, two populations each consisting of multiple tracking cells are associated with two logic levels of the multi-bit cell. In an analog implementation, the user cells are read directly using the analog threshold values of the tracking cell populations without their first being translated to digital values. A set of alternate embodiments provide for using different voltages and/or timing for the writing of tracking cells to provide less uncertainty in the tracking cells' final written thresholds.

公开(公告)号：EP2264605A1

公开(公告)日：2010-12-22

申请号：EP10009239.4

申请日：2005-03-07

申请人： Sandisk Corporation

发明人： Conley, Kevin M. ,  Elhamias, Reuven

IPC分类号： G06F12/08

CPC分类号： G06F12/0862 ,  G06F12/0804 ,  G06F12/0866 ,  G06F2212/2022 ,  G06F2212/214 ,  G06F2212/2146 ,  G06F2212/282 ,  G06F2212/502

摘要： A buffer cache interposed between a non-volatile memory and a host may be partitioned into segments that may operate with different policies. Cache policies include write-through, wire and read-look-ahead. Write-through and write back policies may improve speed. Read-look-ahead cache allows more efficient use of the bus between the buffer cache and non-volatile memory. A session command allows data to be maintained in volatile memory by guaranteeing against power loss.

公开(公告)号：EP2053501A3

公开(公告)日：2009-09-16

申请号：EP09001942.3

申请日：2006-10-12

申请人： SanDisk Corporation

发明人： Conley, Kevin M.

IPC分类号： G06F13/16 ,  G06F9/445 ,  G06F9/44

CPC分类号： G11C16/20 ,  G06F9/445

摘要： A digital system including flash memory, coupled to a system-on-a-chip within which a flash memory subsystem controller is embedded, is disclosed. The system-on-a-chip includes support for a standard external interface, such as a Universal Serial Bus (USB) or IEEE 1394 interface, to which a host system such as flash memory test equipment can connect. Initialization of the flash memory is effected by opening a communications channel between the host system and the embedded flash memory subsystem controller. The host system can then effect initialization of the flash memory subsystem, including formatting of the flash memory arrays, loading application programs, and the like, over the communications channel.

公开(公告)号：EP1713085A1

公开(公告)日：2006-10-18

申请号：EP06016209.6

申请日：2003-10-09

申请人： SanDisk Corporation

发明人： Gonzalez, Carlos J. ,  Conley, Kevin M.

IPC分类号： G11C16/34

CPC分类号： G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7211 ,  G11C16/349 ,  G11C16/3495 ,  G11C29/76

摘要： Methods and apparatus for performing wear leveling in a non-volatile memory system are disclosed. Included is a method for performing wear leveling in a memory system that includes a first zone, which has a first memory element that includes contents, and a second zone includes identifying the first memory element and associating the contents of the first memory element with the second zone while disassociating the contents of the first memory element from the first zone. In one embodiment, associating the contents of the first memory element with the second involves moving contents of a second memory element into a third memory element, then copying the contents of the first memory element into the second memory element.

摘要翻译： 公开了在非易失性存储器系统中执行磨损均衡的方法和装置。 包括用于在存储器系统中执行损耗均衡的方法，该存储器系统包括具有包括内容的第一存储器元件的第一区，并且第二区包括识别第一存储器元件并将第一存储元件的内容与第二存储元件 同时将第一存储元件的内容与第一区分离。 在一个实施例中，将第一存储器元件的内容与第二存储元件相关联包括将第二存储元件的内容移动到第三存储器元件中，然后将第一存储元件的内容复制到第二存储元件中。

公开(公告)号：EP1653323A3

公开(公告)日：2011-01-26

申请号：EP06075106.2

申请日：2002-01-07

申请人： SanDisk Corporation

发明人： Conley, Kevin M.

IPC分类号： G06F12/02 ,  G06F3/06

CPC分类号： G11C16/102 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06F2212/7209 ,  G11C16/105 ,  G11C2216/16

摘要： Data in less than all of the pages of a non-volatile memory block are updated by programming the new data in unused pages of either the same or another block. In order to prevent having to copy unchanged pages of data into the new block, or to program flags into superceded pages of data, the pages of new data are identified by the same logical address as the pages of data which they superceded and a time stamp is added to note when each page was written. When reading the data, the most recent pages of data are used and the older superceded pages of data are ignored. This technique is also applied to metablocks that include one block from each of several different units of a memory array, by directing all page updates to a single unused block in one of the units.

公开(公告)号：EP2254053A3

公开(公告)日：2010-12-08

申请号：EP10009240.2

申请日：2005-06-17

申请人： Sandisk Corporation

发明人： Conley, Kevin M. ,  Sinclair, Alan Welsh ,  Smith, Peter John

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7205 ,  Y10S707/99953 ,  Y10S707/99957

摘要： Techniques for managing data in a non-volatile memory system (e.g., Flash Memory) are disclosed. A controller can use information relating to a host's file system, which is stored by the host on non-volatile memory, to determine if one or more clusters (or sectors with clusters) are currently allocated. The controller can use the information relating to the host's file system to identify when the host is sending data to the next free cluster and to store such data in a sequential format by copying data from other locations in the non-volatile memory.

公开(公告)号：EP2254053A2

公开(公告)日：2010-11-24

申请号：EP10009240.2

申请日：2005-06-17

申请人： Sandisk Corporation

发明人： Conley, Kevin M. ,  Sinclair, Alan Welsh ,  Smith, Peter John

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7205 ,  Y10S707/99953 ,  Y10S707/99957

摘要： Techniques for managing data in a non-volatile memory system (e.g., Flash Memory) are disclosed. A controller can use information relating to a host's file system, which is stored by the host on non-volatile memory, to determine if one or more clusters (or sectors with clusters) are currently allocated. The controller can use the information relating to the host's file system to identify when the host is sending data to the next free cluster and to store such data in a sequential format by copying data from other locations in the non-volatile memory.

摘要翻译： 公开了用于在非易失性存储器系统（例如，闪存）中管理数据的技术。 控制器可以使用由主机在非易失性存储器上存储的主机文件系统相关的信息来确定当前是否分配了一个或多个集群（或具有集群的扇区）。 控制器可以使用与主机文件系统相关的信息来识别主机何时向下一个空闲簇发送数据，并通过从非易失性存储器中的其他位置复制数据来以顺序格式存储这些数据。

公开(公告)号：EP2053501A2

公开(公告)日：2009-04-29

申请号：EP09001942.3

申请日：2006-10-12

申请人： SanDisk Corporation

发明人： Conley, Kevin M.

IPC分类号： G06F9/44 ,  G06F13/16

CPC分类号： G11C16/20 ,  G06F9/445

摘要： A digital system including flash memory, coupled to a system-on-a-chip within which a flash memory subsystem controller is embedded, is disclosed. The system-on-a-chip includes support for a standard external interface, such as a Universal Serial Bus (USB) or IEEE 1394 interface, to which a host system such as flash memory test equipment can connect. Initialization of the flash memory is effected by opening a communications channel between the host system and the embedded flash memory subsystem controller. The host system can then effect initialization of the flash memory subsystem, including formatting of the flash memory arrays, loading application programs, and the like, over the communications channel.

摘要翻译： 公开了一种包括快闪存储器的数字系统，其耦合到其中嵌入有闪存子系统控制器的片上系统。 片上系统包括支持诸如通用串行总线（USB）或IEEE 1394接口的标准外部接口，诸如闪存测试设备的主机系统可以连接到该接口。 通过打开主机系统和嵌入式闪存子系统控制器之间的通信信道来实现闪速存储器的初始化。 主机系统然后可以通过通信信道实现闪存子系统的初始化，包括闪存阵列的格式化，加载应用程序等。