利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

11 条记录 (耗时 0.013 秒)

    Sub-sampling mixer
    1.
    发明公开
    Sub-sampling mixer 有权
    Mischer unter Verwendung von Unterabtastung von Signalen

    公开(公告)号：EP1176708A2

    公开(公告)日：2002-01-30

    申请号：EP01201318.1

    申请日：2001-04-10

    申请人： Texas Instruments Incorporated

    发明人： Staszewski, Robert B. ,  Leipold, Dirk

    IPC分类号： H03D7/00

    CPC分类号： H03D7/1441 ,  H03D7/125 ,  H03D7/1466 ,  H03D7/1475 ,  H04B1/28

    摘要： A multi-tap, digital-pulse-driven mixer advantageously avoids local oscillator (11) leakage by shifting the local oscillator frequency (F LO ) out of the received frequency band. Low noise figures are advantageously realized by the use of digital pulses (51, 52) as mixer drive signals (16).

    摘要翻译： 多抽头数字脉冲驱动混频器有利地通过将本地振荡器频率（FLO）移出接收频带来避免本地振荡器（11）的泄漏。 通过使用数字脉冲（51,52）作为混频器驱动信号（16），有利地实现了低噪声系数。

    Efficient charge transfer using a switched capacitor resistor
    3.
    发明公开
    Efficient charge transfer using a switched capacitor resistor 审中-公开
    Effizienter Ladungstransfer unter Verwendung eines开关电容器Widerstands

    公开(公告)号：EP1363432A1

    公开(公告)日：2003-11-19

    申请号：EP03101387.3

    申请日：2003-05-16

    申请人： Texas Instruments Incorporated

    发明人： Staszewski, Robert B. ,  Muhammad, Khurram ,  Hung, Chih-Ming ,  Leipoid, Dirk

    IPC分类号： H04L27/156 ,  H04B1/30

    CPC分类号： H03D7/125 ,  H04B1/1036

    摘要： The application of a non-zero voltage offset to rotating capacitors 1111 and 1112 permit the use of a single positive voltage supply. However, the precharging of the rotating capacitors 1111 and 1112 is power inefficient. A power efficient and low-noise precharging operation is realized through the sharing of the charge on a feedback capacitor 1075 and 1080 that is significantly larger than the rotating capacitors 1111. Once a precharging operation is complete, the charge on the feedback capacitor 1075 and 1080 is refreshed from its residual charge level (rather than zero charge level) to a desired charge level.

    摘要翻译： 对旋转电容器1111和1112施加非零电压偏移允许使用单个正电压电源。 然而，旋转电容器1111和1112的预充电功率无效。 通过在明显大于旋转电容器1111的反馈电容器1075和1080上共享电荷来实现功率有效和低噪声的预充电操作。一旦预充电操作完成，反馈电容器1075和1080上的电荷 从其剩余电荷水平（而不是零电荷水平）刷新到所需的电荷水平。

    Phase detector
    4.
    发明授权
    Phase detector 有权

    公开(公告)号：EP1816741B1

    公开(公告)日：2018-10-03

    申请号：EP07108304.2

    申请日：2001-07-02

    申请人： Texas Instruments Incorporated

    发明人： Staszewski, Robert B. ,  Leipold, Dirk

    IPC分类号： H03D13/00 ,  H03L7/091 ,  H03L7/085

    CPC分类号： H03L7/085 ,  H03L7/087 ,  H03L7/091 ,  H03L2207/50

    摘要： A digital fractional phase detector (200) is provided to realize a frequency synthesizer architecture (100) that naturally combines transmitter modulation capability with a wideband all-digital PLL modulation scheme to maximize a digitally-intensive implementation by operating in a synchronous phase domain. Synchronous logic is provided across a digitally controlled VCO (104) and is synchronous to the VCO output clock by implementing a timing adjustment in association with a reference calculation to allow a frequency control word to contain both channel information and transmit modulation information. The digital fractional phase detector (200) is capable of accommodating a quantization scheme to measure fractional delay differences between the significant edge of the VCO output clock (110) and a reference clock by using a time-to-digital converter (201) to express the time difference as a digital word for use by the frequency synthesizer.

    Phase detector
    6.
    发明公开
    Phase detector 审中-公开
    相位检测器

    公开(公告)号：EP1816741A1

    公开(公告)日：2007-08-08

    申请号：EP07108304.2

    申请日：2001-07-02

    申请人： Texas Instruments Incorporated

    发明人： Staszewski, Robert B. ,  Leipold, Dirk

    IPC分类号： H03D13/00 ,  H03L7/091 ,  H03L7/085

    CPC分类号： H03L7/085 ,  H03L7/087 ,  H03L7/091 ,  H03L2207/50

    摘要： There is provided a digital fractional phase detector (200) comprising a first input to receive an oscillator clock signal (CKV) and a second input to receive a frequency reference clock signal (FREF). A time-to-digital converter TDC (201) is coupled to said first input and said second input, said TDC producing a signal indicative of timing difference between said oscillator clock signal and said frequency clock signal. A normalizer (NORM) is coupled to said TDC (201), said normalizer producing an output, wherein said output is normalized to a period of said oscillator clock signal. Also provided is a method of generating a fractional phase error signal whereby a timing difference between an oscillator clock signal and a frequency reference clock signal is obtained, and then normalizing said timing difference to a period of said oscillator clock signal.

    摘要翻译： 提供了一种数字分数相位检测器（200），包括接收振荡器时钟信号（CKV）的第一输入端和接收频率参考时钟信号（FREF）的第二输入端。 时间数字转换器TDC（201）耦合到所述第一输入端和所述第二输入端，所述TDC产生表示所述振荡器时钟信号与所述频率时钟信号之间的定时差的信号。 归一化器（NORM）耦合到所述TDC（201），所述归一化器产生输出，其中所述输出归一化为所述振荡器时钟信号的周期。 还提供一种产生分数相位误差信号的方法，由此获得振荡器时钟信号和频率基准时钟信号之间的定时差，然后将所述定时差归一化为所述振荡器时钟信号的周期。

    A Sigma-Delta (SD) Analog-To-Digital Converter (ADC) structure incorporating a direct sampling mixer
    10.
    发明公开
    A Sigma-Delta (SD) Analog-To-Digital Converter (ADC) structure incorporating a direct sampling mixer 有权
    Sigma-Delta Analog-Digital-Wandleranordnung mit einem direkt abtastenden Mischer

    公开(公告)号：EP1411639A2

    公开(公告)日：2004-04-21

    申请号：EP03103860.7

    申请日：2003-10-17

    申请人： TEXAS INSTRUMENTS INCORPORATED

    发明人： Staszewski, Robert B. ,  Chen, Feng ,  Muhammad, Khurram ,  Leipold, Dirk

    IPC分类号： H03M3/02

    CPC分类号： H03M3/47 ,  H03M3/496 ,  H04B1/1036

    摘要： A sigma-delta analog-to-digital converter offers advantages such as noise shaping and high frequency operation. However, a sampling circuit needed to provide a highly oversampled discrete-time sample stream with low noise characteristics is difficult to design and implement. The present invention provides a sigma-delta mixer 300 with such a sampling circuit 310. The present invention discloses a sampling circuit using switched capacitors 307, 308, and 309 with low noise characteristics and at the same time is capable of providing a highly oversampled discrete-time sample stream.

    摘要翻译： Σ-Δ模数转换器提供了诸如噪声整形和高频操作等优点。 然而，需要提供具有低噪声特性的高度过采样的离散时间采样流所需的采样电路难以设计和实现。 本发明提供了具有这种采样电路310的Σ-Δ混合器300.本发明公开了一种使用具有低噪声特性的开关电容器307,308和309的采样电路，并且同时能够提供高度过采样的离散 时间采样流。