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    GAS-INTAKE-HOLE ARRAY STRUCTURE AND SOLDERING DEVICE
    1.
    发明授权
    GAS-INTAKE-HOLE ARRAY STRUCTURE AND SOLDERING DEVICE 有权
    进气孔阵列结构和焊接装置

    公开(公告)号：EP2941104B1

    公开(公告)日：2017-11-15

    申请号：EP13868049.1

    申请日：2013-12-20

    申请人： SENJU METAL INDUSTRY CO., LTD.

    发明人： HIYAMA Tsutomu

    IPC分类号： F27D5/00

    CPC分类号： B05B1/005 ,  B23K1/0016 ,  B23K1/008 ,  B23K1/012 ,  B23K3/04 ,  B23K3/085 ,  F27B9/02 ,  F27B9/06 ,  F27B9/10 ,  F27D5/0037 ,  H05K3/3494 ,  H05K2203/081

    摘要： In a gas-intake-port array structure, which enables any temperature fluctuation during conveying time of a printed circuit board, a semiconductor wafer or the like to be reduced and allows the printed circuit board and the like to be very uniformly heated or cooled, a nozzle pattern P2 is arranged to be line symmetry with a nozzle pattern P1 in one upper or lower divided section of a nozzle layout region of the nozzle cover 3 relative to a center portion that is orthogonal to a conveying direction, as shown in FIG. 1 . In order for the arrangement patterns diagonally arranged in the nozzle layout region to become identical, the nozzle pattern P1 is arranged to be line symmetry with the nozzle pattern P2 in the other upper or lower divided section. Intake ports 3b, 3c and 3d each having a predetermined opening width are arranged between two blowing nozzles 2 or more and across a first row thereof and plural other rows having different phases, in order to circulate the gas blown from the blowing nozzles 2. Widths of the intake ports 3b, 3c and 3d are set so that they are gradually become narrower with increasing distance from the center portion.

    GAS-INTAKE-HOLE ARRAY STRUCTURE AND SOLDERING DEVICE
    2.
    发明公开
    GAS-INTAKE-HOLE ARRAY STRUCTURE AND SOLDERING DEVICE 有权
    GASEINLASSLOCH-ARRAYSTRUKTUR UNDLÖTVORRICHTUNG

    公开(公告)号：EP2941104A1

    公开(公告)日：2015-11-04

    申请号：EP13868049.1

    申请日：2013-12-20

    申请人： SENJU METAL INDUSTRY CO., LTD.

    发明人： HIYAMA Tsutomu

    IPC分类号： H05K3/34 ,  B23K1/008 ,  B23K3/04 ,  B23K101/40 ,  B23K101/42

    CPC分类号： B05B1/005 ,  B23K1/0016 ,  B23K1/008 ,  B23K1/012 ,  B23K3/04 ,  B23K3/085 ,  F27B9/02 ,  F27B9/06 ,  F27B9/10 ,  F27D5/0037 ,  H05K3/3494 ,  H05K2203/081

    摘要： In a gas-intake-port array structure, which enables any temperature fluctuation during conveying time of a printed circuit board, a semiconductor wafer or the like to be reduced and allows the printed circuit board and the like to be very uniformly heated or cooled, a nozzle pattern P2 is arranged to be line symmetry with a nozzle pattern P1 in one upper or lower divided section of a nozzle layout region of the nozzle cover 3 relative to a center portion that is orthogonal to a conveying direction, as shown in FIG. 1 . In order for the arrangement patterns diagonally arranged in the nozzle layout region to become identical, the nozzle pattern P1 is arranged to be line symmetry with the nozzle pattern P2 in the other upper or lower divided section. Intake ports 3b, 3c and 3d each having a predetermined opening width are arranged between two blowing nozzles 2 or more and across a first row thereof and plural other rows having different phases, in order to circulate the gas blown from the blowing nozzles 2. Widths of the intake ports 3b, 3c and 3d are set so that they are gradually become narrower with increasing distance from the center portion.

    摘要翻译： 在能够减少印刷电路板，半导体晶片等的传送时间期间的任何温度波动并允许印刷电路板等被非常均匀地加热或冷却的气体进气口阵列结构中， 如图3所示，喷嘴图案P2被布置成与喷嘴盖3的喷嘴布局区域的一个上部或下部分割部分中的喷嘴图案P1相对于与输送方向正交的中心部分线性对称。 1。 为了使喷嘴布局区域中对角布置的布置图案变得相同，喷嘴图案P1布置成与另一个上部或下部分割部分中的喷嘴图案P2线性对称。 每个具有预定开口宽度的进气口3b，3c和3d布置在两个吹气喷嘴2之间，并且跨越其第一排和多个具有不同相位的其它行，以便使从吹风喷嘴2吹出的气体循环。宽度 进气口3b，3c和3d设置成随着距离中心部分的距离的增加而逐渐变窄。

    HEAT TREATMENT JIG FOR SEMICONDUCTOR SILICON SUBSTRATE
    3.
    发明公开
    HEAT TREATMENT JIG FOR SEMICONDUCTOR SILICON SUBSTRATE 有权
    WÄRMEBEHANDLUNGS-EINSPANNVORRICHTUNGFÜREIN HALBLEITER-SILIZIUMSUBSTRAT

    公开(公告)号：EP1780774A1

    公开(公告)日：2007-05-02

    申请号：EP05750967.1

    申请日：2005-06-17

    申请人： SUMCO Corporation

    发明人： Adachi, Naoshi c/o Sumco Corporation

    IPC分类号： H01L21/22 ,  H01L21/31 ,  H01L21/324 ,  H01L21/68

    CPC分类号： H01L21/67306 ,  F27D5/0037 ,  H01L21/67303 ,  H01L21/67309 ,  H01L21/6732 ,  H01L21/67323

    摘要： A heat treatment jig for supporting silicon semiconductor substrates by contacting, being loaded onto a heat treatment boat in a vertical heat treatment furnace, comprises; the configuration of a ring or a disc structure with the thickness between 1.5 and 6.0 mm; the deflection displacement of 100 µm or less at contact region in loaded condition; the outer diameter which is 65% or more of the diameter of said substrate; and the surface roughness (Ra) of between 1.0 and 100 µm at the contact region. The use of said jig enables to effectively retard the slip generation and to avoid the growth hindrance of thermally oxidized film at the back surface of said substrate, diminishing the surface steps which should cause the defocus in photolithography step in device fabrication process, thereby enabling to maintain high quality of silicon semiconductor substrates and to substantially enhance the device yield.

    摘要翻译： 一种用于通过在立式热处理炉中加载到热处理船上的接触来支撑硅半导体衬底的热处理夹具包括： 环形或圆盘结构的结构，厚度介于1.5至6.0毫米之间; 在负载状态下接触区域的偏转位移为100μm以下; 外径为所述基板的直径的65％以上。 并且在接触区域的表面粗糙度（Ra）在1.0和100μm之间。 所述夹具的使用能够有效地延缓滑移生成并避免热氧化膜在所述基板的背面的增长阻碍，从而减少在器件制造过程中在光刻步骤中造成散焦的表面步骤，由此使得能够 保持硅半导体衬底的高质量并大大提高器件产量。

    JIG FOR ELECTRONIC PART FIRING
    4.
    发明公开
    JIG FOR ELECTRONIC PART FIRING 审中-公开
    SPANNVORRICHTUNG ZUM BRENNEN VON ELEKTRONISCHEN TEILEN

    公开(公告)号：EP1734022A1

    公开(公告)日：2006-12-20

    申请号：EP05727727.9

    申请日：2005-03-31

    申请人： MITSUI MINING & SMELTING CO., LTD.

    发明人： KAJINO, Hitoshi MITSUI MINING & SMELTING CO. Ltd. ,  UCHIDA, Tatsuhiko MITSUI MINING & SMELTING CO. Ltd

    IPC分类号： C04B35/64 ,  F27D3/12 ,  C04B41/87

    CPC分类号： F27D5/0037 ,  C04B35/64 ,  C04B41/009 ,  C04B41/5042 ,  C04B41/87 ,  C04B2235/3208 ,  C04B2235/3246 ,  C04B2235/80 ,  Y10T428/12 ,  Y10T428/252 ,  C04B35/10

    摘要： [Problem] The long-term use of a conventional jig for calcining an electronic component arises a problem such as peel-off of a zirconia surface layer. Even if the performance is not deteriorated in the short-term use, the zirconia surface layer reacts with the electronic component to shorten the life of the jig for calcining the electronic component when the use is prolonged for a longer period of time.
    [Means for solving problem] A jig for calcining an electronic component is provided which is stable after use of a longer period of time by suitably setting the composition of a zirconia surface layer. For example, in the zirconia surface layer containing zirconia particles and a partially fused-bonding agent, an amount of calcia is made to be 4 to 15 % in weight.

    摘要翻译： 长期使用常规的用于煅烧电子部件的夹具产生诸如氧化锆表面层的剥离的问题。 即使在短期使用中性能不劣化的情况下，氧化锆表面层与电子部件发生反应，能够延长长时间使用时的电子部件煅烧用具的寿命。 解决问题的手段提供了一种用于煅烧电子部件的夹具，其通过适当地设定氧化锆表面层的组成，在使用较长时间后是稳定的。 例如，在含有氧化锆粒子的氧化锆表面层和部分熔融粘合剂中，氧化钙的量为4〜15重量％。

    Method for processing solar cell substrates in a vertical furnace
    6.
    发明公开
    Method for processing solar cell substrates in a vertical furnace 审中-公开
    在einem senkrechten Ofen的Verfahren zur Verarbeitung von Solarzellensubstraten

    公开(公告)号：EP2395546A2

    公开(公告)日：2011-12-14

    申请号：EP11169577.1

    申请日：2011-06-10

    申请人： ASM International N.V.

    发明人： de Ridder, Chris G.M. ,  Boonstra, Klaas P. ,  Garssen, Adriaan ,  Huussen, Frank

    IPC分类号： H01L21/673 ,  H01L31/18 ,  C23C16/458 ,  F27B17/00

    CPC分类号： H01L21/67303 ,  C23C16/45546 ,  C23C16/4587 ,  F27B17/0025 ,  F27D5/0037 ,  H01L21/67109 ,  H01L21/67313 ,  H01L21/67757 ,  H01L31/1864 ,  H01L31/1876 ,  Y02E10/547 ,  Y02P70/521

    摘要： A method for processing solar cells comprising:
    - providing a vertical furnace to receive an array of mutually spaced circular semiconductor wafers for integrated circuit processing;
    - composing a process chamber loading configuration for solar cell substrates, wherein a size of the solar cell substrates that extends along a first surface to be processed is smaller than a corresponding size of the circular semiconductor wafers, such that multiple arrays of mutually spaced solar cell substrates can be accommodated in the process chamber,
    - loading the solar cell substrates into the process chamber;
    - subjecting the solar cell substrates to a process in the process chamber.

    摘要翻译： 一种用于处理太阳能电池的方法，包括： - 提供垂直炉以接收用于集成电路处理的相互间隔开的圆形半导体晶片阵列; - 构成用于太阳能电池基板的处理室装载配置，其中沿着待处理的第一表面延伸的太阳能电池基板的尺寸小于圆形半导体晶片的相应尺寸，使得相互间隔开的太阳能电池的多个阵列 基板可以容纳在处理室中， - 将太阳能电池基板装载到处理室中; - 对太阳能电池基板进行处理室中的处理。

    VERFAHREN UND VORRICHTUNG ZUM THERMISCHEN BEHANDELN VON SUBSTRATEN SOWIE AUFNAHMEEINHEIT FÜR SUBSTRATE
    9.
    发明公开
    VERFAHREN UND VORRICHTUNG ZUM THERMISCHEN BEHANDELN VON SUBSTRATEN SOWIE AUFNAHMEEINHEIT FÜR SUBSTRATE 审中-公开

    公开(公告)号：EP3387670A1

    公开(公告)日：2018-10-17

    申请号：EP16805443.5

    申请日：2016-12-02

    申请人： centrotherm international AG

    发明人： MÜLLER, Steffen ,  ASCHNER, Helmut ,  KELLER, Thomas ,  KEGEL, Wilhelm ,  LERCH, Wilfried

    IPC分类号： H01L21/67 ,  H01L21/324 ,  F27B17/00 ,  H01L33/00 ,  H01L21/687 ,  F27D5/00

    CPC分类号： H01L21/67115 ,  F27B17/0025 ,  F27D5/0037 ,  H01L21/68742 ,  H01L21/6875 ,  H01L21/68785

    摘要： The invention relates to a method and to a device for the thermal treatment of substrates, in particular semiconductor wafers, and to a holding unit for substrates. In the method, in a process unit having a process chamber and having a plurality of radiation sources, one or more substrates are held in a box having a lower part and having a cover, wherein the lower part and the cover form a holding space for the substrate therebetween. Furthermore, the following steps are performed in the method: loading the box and the substrate into the process chamber and closing the process chamber; purging the holding space of the box with a purging gas and/or a process gas before the box and the substrate contained therein are heated to a desired process temperature in order to establish a desired atmosphere inside the box; and heating the box and the substrate contained therein to the desired process temperature by means of thermal radiation emitted by the radiation sources. The holding unit for substrates is designed to support the substrates in a process unit having a process chamber and having a plurality of radiation sources. The holding unit has a lower part and a cover, which form a box therebetween in the closed state, said box having a holding space for the substrate, wherein at least one of the parts has a plurality of purging openings, which connect a periphery of the box to the holding space in order enable the purging of the holding space in the closed state of the box, wherein the purging openings are designed in such a way that the purging openings substantially prevent the passage of thermal radiation of the radiation sources.