公开(公告)号：EP4425952A2

公开(公告)日：2024-09-04

申请号：EP24182757.5

申请日：2022-03-18

Applicant: CANON KABUSHIKI KAISHA

Inventor： ONUKI, Yusuke

IPC: H04N25/633

CPC classification number: H01L27/14612 ,  H01L27/1461 ,  H01L27/14603 ,  H01L27/14643 ,  H04N25/621 ,  H04N25/633

Abstract: Provided is a photoelectric conversion device comprising a pixel array including a first pixel and a second pixel, wherein the first pixel includes a photoelectric conversion unit including a first semiconductor region of a first conductivity type as a charge accumulation layer and photoelectrically converts incident light to output a signal in accordance with the incident light, and wherein the second pixel includes a second semiconductor region of the first conductivity type, a transistor including a first main electrode formed by a third semiconductor region connected to the second semiconductor region and a gate, an insulating layer having a first hole and a second hole, a first conductive member arranged so as to pass through the first hole and connected between a power source wiring supplied with a power source potential and the third semiconductor region, and a second conductive member arranged so as to pass through the second hole and connected between the power source wiring and the gate.

公开(公告)号：EP4388592A1

公开(公告)日：2024-06-26

申请号：EP22864904.2

申请日：2022-08-11

Applicant: Trupixel Inc.

Inventor： LEE, Myung-Jae

IPC: H01L31/107 ,  G01J1/44

CPC classification number: H01L27/14627 ,  H01L27/14603 ,  H01L27/1462 ,  H01L27/1461

公开(公告)号：EP2981069B1

公开(公告)日：2018-12-05

申请号：EP15176840.5

申请日：2015-07-15

Applicant: Canon Kabushiki Kaisha

Inventor： HASHIMOTO, Seiji ,  TAKAHASHI, Hidekazu ,  FURUBAYASHI, Atsushi

IPC: H04N9/04 ,  H04N5/378 ,  H04N5/374 ,  H01L27/146 ,  H01L31/0352 ,  H04N5/3745

CPC classification number: H04N5/3742 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14627 ,  H01L27/14641 ,  H01L27/14647 ,  H01L27/14667 ,  H01L31/035218 ,  H04N5/3745 ,  H04N5/37452 ,  H04N5/378 ,  H04N9/045

Abstract: A photoelectric conversion apparatus (10) including a plurality of photoelectric conversion units (101a, 101b) each of which includes a first electrode (201), a second electrode (209), a photoelectric conversion layer (205) which accumulates signal charges and which is disposed between the first and second electrodes, and an insulating layer (207) disposed between the photoelectric conversion layer and the second electrode, an amplification unit (16a) configured to receive optical signals and output signals each based on one of the optical signals, each of the optical signals being based on one of the signal charges, each of the signal charges being accumulated in one of the plurality of photoelectric conversion units, and a capacitive element (12b) having a first node and a second node, the first node being connected to the second electrodes of the plurality of photoelectric conversion units and the amplification unit and the second node selectively receiving each one of a plurality of potentials having different values.

公开(公告)号：EP3352219A1

公开(公告)日：2018-07-25

申请号：EP16846293.5

申请日：2016-09-05

Applicant: Sony Semiconductor Solutions Corporation

Inventor： INOUE Susumu ,  YORIKADO Yuhi ,  TODA Atsushi

IPC: H01L27/146 ,  H01L31/10 ,  H01L31/107 ,  H04N5/369

CPC classification number: H01L27/1462 ,  H01L27/14607 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14647 ,  H01L27/14685 ,  H01L31/10 ,  H01L31/107 ,  H04N5/374

Abstract: The present technology relates to a solid-state image sensing device for preventing a reduction in light receiving sensitivity of an avalanche photodiode, an electronic device, and a method for manufacturing the solid-state image sensing device.
A solid-state image sensing device includes an avalanche photodiode having a first region of a first conductive type, a second region of a second conductive type different from the first conductive type, and an avalanche region sandwiched between the first region and the second region, which extend in a thickness direction of a semiconductor substrate, and a film formed on at least one side of the semiconductor substrate and including a metal oxide film, a metal nitride film, or a mix crystal-based film of metal oxide film and metal nitride film. The present technology can be applied to CMOS image sensors, for example.

公开(公告)号：EP3028305B1

公开(公告)日：2018-07-04

申请号：EP14747158.5

申请日：2014-07-17

Applicant: Sony Semiconductor Solutions Corporation

Inventor： SAKANO, Yorito

IPC: H01L27/146 ,  H04N5/355 ,  H04N5/3745

CPC classification number: H01L27/14643 ,  H01L27/14603 ,  H01L27/14607 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14636 ,  H04N5/3559 ,  H04N5/37452

Abstract: A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type.

公开(公告)号：EP3340304A1

公开(公告)日：2018-06-27

申请号：EP17207912.1

申请日：2017-12-18

Applicant: Semiconductor Manufacturing International Corporation (Shanghai) ,  Semiconductor Manufacturing International Corporation (Beijing)

Inventor： CHIU, Tzu Yin ,  WANG, Chong ,  ZHANG, Haifang ,  LIU, Xuanjie

IPC: H01L27/146

CPC classification number: H01L27/1461 ,  H01L27/14609 ,  H01L27/14636 ,  H01L27/14643 ,  H01L27/14689 ,  H01L27/14698

Abstract: The present invention relates to the technical field of semiconductors, and discloses an image sensor and a manufacturing method therefor. The image sensor includes: a semiconductor substrate (301); a first active region (311) located on the semiconductor substrate; a doped semiconductor layer (530) located on the first active region; and a contact (870) located on the semiconductor layer, where the first active region includes: a first doped region (321) and a second doped region (322) abutting against the first doped region, wherein the second doped region is located at an upper surface of the first active region, and wherein the second doped region is formed by dopants in the semiconductor layer that are annealed to be diffused to a surface layer of the first doped region. The present invention may reduce leakage current and improve device performances.

公开(公告)号：EP3218933A1

公开(公告)日：2017-09-20

申请号：EP15858667.7

申请日：2015-11-13

Applicant: Artilux Inc.

Inventor： CHENG, Szu-Lin ,  LIU, Han-Din ,  CHEN, Shu-Lu

IPC: H01L27/146 ,  H01L31/18

CPC classification number: H01L27/14685 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/1469 ,  H01L31/02161 ,  H01L31/022408 ,  H01L31/028 ,  H01L31/036 ,  H01L31/105 ,  H01L31/18 ,  H01L31/1808 ,  H01L31/1868 ,  Y02E10/50 ,  Y02P70/521

Abstract: A light absorption apparatus includes a substrate, a light absorption layer above the substrate on a first selected area, a silicon layer above the light absorption layer, a spacer surrounding at least part of the sidewall of the light absorption layer, an isolation layer surrounding at least part of the spacer, wherein the light absorption apparatus can achieve high bandwidth and low dark current.

Abstract translation: 一种光吸收装置，包括：基板;第一选定区域上的基板上方的光吸收层;光吸收层上方的硅层;围绕光吸收层的侧壁的至少一部分的隔离物;围绕在 其中光吸收装置可以实现高带宽和低暗电流。

公开(公告)号：EP3190620A1

公开(公告)日：2017-07-12

申请号：EP16207190.6

申请日：2016-12-28

Applicant: Semiconductor Manufacturing International Corporation (Shanghai) ,  Semiconductor Manufacturing International Corporation (Beijing)

Inventor： JUNG, Dae-Sub ,  CHEN, Deyan ,  SHI, Xuejie

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14689

Abstract: The present invention provides CMOS image sensors and fabrication methods thereof. An exemplary fabrication process of a CMOS image sensor includes providing a substrate having a first region and a second region connecting with the first region at a first end of the first region; forming a transfer transistor on surface of the substrate in the second region; forming a first implanting region in the substrate in the first region using a first mask; forming a second implanting region in the first implanting region by, the first implanting region being separated into a third implanting region on the second implanting region and a fourth implanting region under the second implanting region; forming a fifth region in the second region at the first end using a second mask, connecting the third implanting region with the fourth implanting region.

Abstract translation: 本发明提供CMOS图像传感器及其制造方法。 一种CMOS图像传感器的示例性制造工艺包括：提供具有第一区域和在第一区域的第一端处与第一区域连接的第二区域的衬底; 在所述第二区域中在所述衬底的表面上形成转移晶体管; 使用第一掩模在所述第一区域中的所述衬底中形成第一注入区域; 通过将所述第一注入区域分成所述第二注入区域上的第三注入区域和所述第二注入区域下方的第四注入区域，在所述第一注入区域中形成第二注入区域; 使用第二掩模在第一端处在第二区域中形成第五区域，将第三注入区域与第四注入区域连接。

公开(公告)号：EP2816601B1

公开(公告)日：2017-03-01

申请号：EP13173087.1

申请日：2013-06-20

Applicant: IMEC VZW ,  Katholieke Universiteit Leuven

Inventor： De Munck, Koen ,  Resetar, Tomislav

IPC: H01L27/146

CPC classification number: H01L31/03529 ,  H01L27/1461 ,  H01L27/1463 ,  H01L27/14643 ,  H01L31/102

公开(公告)号：EP3098851A3

公开(公告)日：2017-02-15

申请号：EP16170357.4

申请日：2016-05-19

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Inventor： FREY, Laurent ,  MARTY, Michel ,  MASAROTTO, Lilian

IPC: H01L27/146

CPC classification number: H01L27/14685 ,  H01L27/1461 ,  H01L27/14621 ,  H01L27/14636 ,  H01L27/14649 ,  H01L27/14689

Abstract: L'invention concerne un capteur d'image ayant une partie comprenant des niveaux d'interconnexion formés sur un substrat semiconducteur (1) recouvert d'une première couche d'un matériau diélectrique, comprenant des pistes conductrices (15-1, 15-2, 15-3) séparées les unes des autres par des couches isolantes (6-1, 6-2, 6-3, 6-4), reliées entre elles par des vias (16-1, 16-2, 16-3) traversant les couches isolantes, et un filtre passe-bande dans l'infrarouge comprenant des niveaux de filtre adjacents aux niveaux d'interconnexion formés par une alternance de deuxièmes couches (6-1, 6-2, 6-3) du matériau diélectrique, et de couches de silicium (5-1, 5-2, 5-3), l'indice de réfraction du matériau diélectrique étant inférieur à 2,5 à la longueur d'onde de transmission maximale du filtre, l'une des deuxièmes couches diélectriques de chaque niveau de filtre étant identique à la couche isolante du niveau d'interconnexion adjacent.