ADJUSTABLE FIELD EFFECT RECTIFIER
    1.
    发明公开
    ADJUSTABLE FIELD EFFECT RECTIFIER 审中-公开
    可调场效应整流器

    公开(公告)号:EP2232559A4

    公开(公告)日:2012-08-01

    申请号:EP08833488

    申请日:2008-09-25

    IPC分类号: H01L29/861 H01L21/334

    摘要: A rectifier building block has four electrodes: source, drain, gate and probe. The main current flows between the source and drain electrodes. The gate voltage controls the conductivity of a narrow channel under a MOS gate and can switch the RBB between OFF and ON states. Used in pairs, the RBB can be configured as a three terminal half-bridge rectifier which exhibits better than ideal diode performance, similar to synchronous rectifiers but without the need for control circuits. N-type and P-type pairs can be configured as a full bridge rectifier. Other combinations are possible to create a variety of devices.

    VERTICAL METAL OXIDE SEMICONDUCTOR FIELD-EFFECT DIODES
    3.
    发明公开
    VERTICAL METAL OXIDE SEMICONDUCTOR FIELD-EFFECT DIODES 有权
    制造垂直金属氧化物半导体场效应二极管的方法

    公开(公告)号:EP1393382A2

    公开(公告)日:2004-03-03

    申请号:EP02734352.4

    申请日:2002-05-08

    摘要: Semiconductor diodes having a low forward conduction voltage drop, a low reverse leakage current, a high voltage capability and avalanche energy capability, suitable for use in integrated circuits as well as for discrete devices are disclosed. The semiconductor diodes are diode configured vertical metal oxide semiconductor field effect devices formed using cylindrical semiconductor pedestals (304) on a surface of a semiconductor body and having one diode terminal (324) as the common connection between the gates (318) and drains (312) of the vertical metal oxide semiconductor field effect devices, and one diode terminal (330) as the common connection with the sources (314) of the vertical metal oxide semiconductor field effect devices. A layer (320) of opposite conductivity type to that of the semiconductor body is disposed below said surface of the semiconductor body between pedestals.

    Buried type capacitor for integrated circuits
    4.
    发明公开
    Buried type capacitor for integrated circuits 审中-公开
    严重电容器集成电路

    公开(公告)号:EP1227515A3

    公开(公告)日:2008-07-23

    申请号:EP02250519.2

    申请日:2002-01-25

    申请人: Nokia Corporation

    IPC分类号: H01L21/334 H01L27/02

    CPC分类号: H01L29/66075 H01L27/0248

    摘要: A semiconductor device equipped with a buried type capacitor directly buried inside a semiconductor substrate, wherein three-dimensional cavities 11 each having an aperture on the front side of the flat semiconductor substrate 10 are formed aligned with each other on the substrate 10, a capacitor part A is provided by implementing a capacitor structure of a substrate-buried type inside the cavity 11, and semiconductor base bodies 101 include these capacitor parts A, is provided.

    Buried type capacitor for integrated circuits
    5.
    发明公开
    Buried type capacitor for integrated circuits 审中-公开
    Graltenkondensatorfürintegrierte Schaltkreise

    公开(公告)号:EP1227515A2

    公开(公告)日:2002-07-31

    申请号:EP02250519.2

    申请日:2002-01-25

    申请人: Nokia Corporation

    IPC分类号: H01L21/334 H01L27/02

    CPC分类号: H01L29/66075 H01L27/0248

    摘要: A semiconductor device equipped with a buried type capacitor directly buried inside a semiconductor substrate, wherein three-dimensional cavities 11 each having an aperture on the front side of the flat semiconductor substrate 10 are formed aligned with each other on the substrate 10, a capacitor part A is provided by implementing a capacitor structure of a substrate-buried type inside the cavity 11, and semiconductor base bodies 101 include these capacitor parts A, is provided.

    摘要翻译: 一种半导体器件,其配备有直接埋在半导体衬底内的埋入式电容器,其中在平坦半导体衬底10的前侧具有开口的三维空腔11在衬底10上彼此对准,电容器部分 A通过在空腔11内部实现基板掩埋型的电容器结构,并且提供半导体基体101包括这些电容器部分A。

    Transistors having a quantum-wave interference layer
    6.
    发明公开
    Transistors having a quantum-wave interference layer 审中-公开
    Transistoren mit einer Quantenwelleninterferenzschicht

    公开(公告)号:EP1011147A2

    公开(公告)日:2000-06-21

    申请号:EP99125100.0

    申请日:1999-12-16

    发明人: Kano, Hiroyuki

    摘要: A transistor having an electron quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B in a p-layer of an npn junction structure. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an even number one fourth of quantum-wave wavelength of carriers in each of the first layer W and the second layer B, the carriers existing around the lowest energy level of the second layer B. The quantum-wave interference layer functions as an electron transmitting layer, and enables to lower a dynamic resistance of the transistor notably. A performance characteristics of a MESFET of an npn junction structure, having the electron transmitting layer is improved compared with a MESFET without an electrode transmitting layer. Similarly, a transistor having a hole reflecting layer, which has an improved performance characteristics, can be obtained. Forming a hole reflecting layer can be applied to a bipolar transistor or a MOSFET.

    摘要翻译: 具有在npn结结构的p层中具有多个周期的一对第一层W和第二层B的电子量子波干涉层的晶体管。 第二层B具有比第一层W更宽的带隙。第一层W和第二层B的厚度通过在第一层W中的每一个中乘以偶数量子波长的四分之一载流子 和第二层B,载体存在于第二层B的最低能级周围。量子波干涉层用作电子发射层,并且能够显着降低晶体管的动态电阻。 与没有电极透射层的MESFET相比,具有电子发射层的npn结结构的MESFET的性能特性得到改善。 类似地,可以获得具有改善的性能特性的具有空穴反射层的晶体管。 形成空穴反射层可以应用于双极晶体管或MOSFET。

    VERFAHREN ZUR HERSTELLUNG EINER MIKROELEKTROMECHANISCHEN VORRICHTUNG UND MIKROELEKTROMECHANISCHE VORRICHTUNG
    7.
    发明公开
    VERFAHREN ZUR HERSTELLUNG EINER MIKROELEKTROMECHANISCHEN VORRICHTUNG UND MIKROELEKTROMECHANISCHE VORRICHTUNG 审中-公开
    一种用于生产微机电装置和微机电器件

    公开(公告)号:EP2550234A2

    公开(公告)日:2013-01-30

    申请号:EP11713722.4

    申请日:2011-03-21

    发明人: TEN-HAVE, Arnd

    IPC分类号: B81C1/00

    摘要: The invention relates to a method for producing a microelectromechanical device in a material substrate suitable for producing integrated electronic components, in particular a semiconductor substrate, wherein a material substrate (12, 14, 16) is provided on which at least one surface structure (26) is to be formed during production of the device. An electronic component (30) is formed in the material substrate (12, 14, 16) using process steps of a conventional method for producing integrated electronic components. A device component (44) defining the position of the electronic component (30) and/or required for the function of the electronic component (30) is selectively formed on the material substrate (12, 14, 16) from an etching stop material acting as an etching stop in case of etching of the material substrate (12, 14, 16) and/or in case of etching of a material layer (52) disposed on the material substrate (12, 14, 16). When the device component (44) of the electronic component (30) is implemented, a boundary region (48) is also formed on the material substrate (12, 14, 16) along at least a partial section of an edge of the surface structure (26), wherein said boundary region bounds said partial section. The material substrate (12, 14, 16) thus implemented is selectively etched for forming the surface structure (26), in that the edge of the bounding region (48) defines the position of the surface structure (26) to be implemented on the material substrate (12, 14, 16).

    ADJUSTABLE FIELD EFFECT RECTIFIER
    8.
    发明公开
    ADJUSTABLE FIELD EFFECT RECTIFIER 审中-公开
    可调场效应整流器

    公开(公告)号:EP2232559A2

    公开(公告)日:2010-09-29

    申请号:EP08833488.3

    申请日:2008-09-25

    IPC分类号: H01L29/78

    摘要: A rectifier building block has four electrodes: source, drain, gate and probe. The main current flows between the source and drain electrodes. The gate voltage controls the conductivity of a narrow channel under a MOS gate and can switch the RBB between OFF and ON states. Used in pairs, the RBB can be configured as a three terminal half-bridge rectifier which exhibits better than ideal diode performance, similar to synchronous rectifiers but without the need for control circuits. N-type and P-type pairs can be configured as a full bridge rectifier. Other combinations are possible to create a variety of devices.

    NANOELECTRONIC DEVICES AND CIRCUITS
    9.
    发明授权
    NANOELECTRONIC DEVICES AND CIRCUITS 有权
    纳米电子元件和电路

    公开(公告)号:EP1380053B1

    公开(公告)日:2007-05-30

    申请号:EP02764075.4

    申请日:2002-04-18

    摘要: Diode devices with superior and pre-settable characteristics and of nanometric dimensions, comprise etched insulative lines (8, 16, 18) in a conductive substrate to define between the lines charge carrier flow paths, formed as elongate channels (20) at least 100 nm long and less than 100 nm wide. The current-voltage characteristic of the diode devices are similar to a conventional diode, but both the threshold voltage (from 0V to a few volts) and the current level (from nA to νA) can be tuned by orders of magnitude by changing the device geometry. Standard silicon wafers can be used as substrates. A full family of logic gates, such as OR, AND, and NOT, can be constructed based on this device solely by simply etching insulative lines in the substrate.

    NANOELECTRONIC DEVICES AND CIRCUITS
    10.
    发明公开
    NANOELECTRONIC DEVICES AND CIRCUITS 有权
    纳米电子元件和电路

    公开(公告)号:EP1380053A2

    公开(公告)日:2004-01-14

    申请号:EP02764075.4

    申请日:2002-04-18

    摘要: Diode devices with superior and pre-settable characteristics and of nanometric dimensions, comprise etched insulative lines (8, 16, 18) in a conductive substrate to define between the lines charge carrier flow paths, formed as elongate channels (20) at least 100 nm long and less than 100 nm wide. The current-voltage characteristic of the diode devices are similar to a conventional diode, but both the threshold voltage (from 0V to a few volts) and the current level (from nA to νA) can be tuned by orders of magnitude by changing the device geometry. Standard silicon wafers can be used as substrates. A full family of logic gates, such as OR, AND, and NOT, can be constructed based on this device solely by simply etching insulative lines in the substrate.