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    Folded cascode amplifier with rail-to-rail common-mode range
    2.
    发明公开
    Folded cascode amplifier with rail-to-rail common-mode range 失效
    折叠式立体声放大器，具有轨至轨共通模式范围

    公开(公告)号：EP0318263A3

    公开(公告)日：1990-03-21

    申请号：EP88311077.7

    申请日：1988-11-23

    申请人： TEXAS INSTRUMENTS INCORPORATED

    发明人： Hsu, Wei-Chan ,  Krenik, William R. ,  Hellums, James R.

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45654 ,  H03F3/45219 ,  H03F2203/45424 ,  H03F2203/45462 ,  H03F2203/45631

    摘要： A folded cascode amplifier with rail-to-rail common-mode range utilizes a fully differential input with two sets of input common source amplifier devices to allow rail-to-rail common-mode range. The first set of devices utilizes N-channel transistors (28) and (32) to provide operation in one direction and P-channel transistors (38) and (42) to allow operation in the other direction. Two common gate amplifier output legs are provided for generating a differential voltage between an output node (50) and an output node (48) in a cascode configuration. A feedback circuit is provided for maintaining node (50) at analog ground over the full common-mode range of the input voltage. The feedback circuit utilizes a current source with transistors (88) and (90) and a differentially configured set of transistors (80) and (82) to control a feedback transistor (86). The feedback transistor (86) controls the current in both of the output legs to maintain the node (50) at analog ground by receiving at one of the differential inputs the voltage on the node (50) and comparing it with analog ground on the other differential input.

    INTEGRATED LOW-CORNER FREQUENCY HIGH PASS FILTER CIRCUIT
    3.
    发明授权
    INTEGRATED LOW-CORNER FREQUENCY HIGH PASS FILTER CIRCUIT 有权
    具有频率低限集成的高通滤波电路

    公开(公告)号：EP1392195B1

    公开(公告)日：2008-04-23

    申请号：EP02727570.0

    申请日：2002-04-19

    申请人： EM Microelectronic-Marin SA

    发明人： BUESCHER, Kevin, Scott ,  LAUFFENBURGER, James, Harold

    IPC分类号： A61C17/20 ,  A61C1/07 ,  A61C1/14 ,  B06B3/00

    CPC分类号： H03H11/126 ,  H03F3/45183 ,  H03F2203/45318 ,  H03F2203/45371 ,  H03F2203/45462 ,  H03F2203/45646 ,  H03F2203/45658

    摘要： There is described a low-corner frequency high pass filter circuit comprising: an operational amplifier (12) having an inverting input (14), a non-inverting input (24) and an ouput (22), a series capacitor (26) having a first end connected to the non-inverting input (24) of the operational amplifier (12) and a second end connected to an input signal (Vin, 28), a first resistor (16) having a first end connected to the inverting input (14) of the operational amplifier (12) and a second end connected to a reference potential, a feedback resistor (20) having a first end connected to the inverting input (14) of the operational amplifier (12) and a second end connected to the output (22) of the differential amplifier (12), and a low gain amplifier circuit (30) having a first input connected to the reference voltage, a second input connected to the output (22) of the operational amplifier (12) and an output (32) connected to the non-inverting input (24) of the operational amplifier (12).

    INTEGRATED LOW-CORNER FREQUENCY HIGH PASS FILTER CIRCUIT
    6.
    发明公开
    INTEGRATED LOW-CORNER FREQUENCY HIGH PASS FILTER CIRCUIT 有权
    具有频率低限集成的高通滤波电路

    公开(公告)号：EP1392195A2

    公开(公告)日：2004-03-03

    申请号：EP02727570.0

    申请日：2002-04-19

    申请人： EM Microelectronic-Marin SA

    发明人： BUESCHER, Kevin, Scott ,  LAUFFENBURGER, James, Harold

    IPC分类号： A61C17/20 ,  A61C1/07 ,  A61C1/14 ,  B06B3/00

    CPC分类号： H03H11/126 ,  H03F3/45183 ,  H03F2203/45318 ,  H03F2203/45371 ,  H03F2203/45462 ,  H03F2203/45646 ,  H03F2203/45658

    摘要： There is described a low-corner frequency high pass filter circuit comprising: an operational amplifier (12) having an inverting input (14), a non-inverting input (24) and an ouput (22), a series capacitor (26) having a first end connected to the non-inverting input (24) of the operational amplifier (12) and a second end connected to an input signal (Vin, 28), a first resistor (16) having a first end connected to the inverting input (14) of the operational amplifier (12) and a second end connected to a reference potential, a feedback resistor (20) having a first end connected to the inverting input (14) of the operational amplifier (12) and a second end connected to the output (22) of the differential amplifier (12), and a low gain amplifier circuit (30) having a first input connected to the reference voltage, a second input connected to the output (22) of the operational amplifier (12) and an output (32) connected to the non-inverting input (24) of the operational amplifier (12).

    LOW-IMPEDANCE CMOS OUTPUT STAGE AND METHOD
    7.
    发明公开
    LOW-IMPEDANCE CMOS OUTPUT STAGE AND METHOD 失效
    具有低阻抗和方法功放电路

    公开(公告)号：EP0935849A1

    公开(公告)日：1999-08-18

    申请号：EP97944313.0

    申请日：1997-09-15

    申请人： Burr-Brown Corporation

    发明人： WU, Michael, A.

    IPC分类号： H03K5 ,  H03F3 ,  H03K19

    CPC分类号： H03F3/45475 ,  H03F3/303 ,  H03F3/3059 ,  H03F3/45183 ,  H03F3/4521 ,  H03F2203/45462 ,  H03F2203/45478 ,  H03F2203/45508 ,  H03F2203/45696 ,  H03F2203/45702

    摘要： A CMOS output circuit including a differential error amplifier (3) is operated to provide a stable quiescent bias current in an output MOSFET by causing a first current equal to a threshold voltage of a P-channel reference MOSFET (M1) divided by the resistance of a reference resistor (R1) to flow through an N-channel current mirror control MOSFET (M4). A first N-channel current mirror output MOSFET (M6) having a gate coupled to the gate of the N-channel current mirror control MOSFET (M4) and a drain coupled to a drain of the P-channel reference MOSFET (M1) causes a second current proportional to the first current to flow through the P-channel reference MOSFET (M1). The first current is controlled in response to feedback from the P-channel reference MOSFET (M1). A bias current in an error amplifier (3) is controlled in response to the N-channel current mirror control MOSFET (M4). The bias current in the error amplifier and the resistances of first (R2) and second (R3) resistive load devices of the error amplifier are scaled to produce a drive voltage which applies a gate-to-source quiescent bias voltage to a P-channel pull-up MOSFET (M11) which is substantially equal to and tracks with the gate-to-source voltage of the reference MOSFET (M1).

    LOW-VOLTAGE CMOS COMPARATOR
    8.
    发明公开
    LOW-VOLTAGE CMOS COMPARATOR 失效
    低电压CMOS比较器

    公开(公告)号：EP0757857A1

    公开(公告)日：1997-02-12

    申请号：EP95917722.0

    申请日：1995-04-27

    申请人： ANALOG DEVICES, INCORPORATED

    发明人： GARAVAN, Patrick, J.

    IPC分类号： H03M1 ,  H03F1 ,  H03F3 ,  H03K5

    CPC分类号： H03F3/45479 ,  H03F1/303 ,  H03F3/45192 ,  H03F3/45475 ,  H03F3/45986 ,  H03F2203/45371 ,  H03F2203/45398 ,  H03F2203/45462 ,  H03F2203/45508 ,  H03F2203/45612 ,  H03F2203/45636 ,  H03F2203/45644

    摘要： A CMOS comparator which includes a capacitor connected in an electrical path between two amplification stages. The comparator also includes a voltage source, and a switch is provided between the voltage source and the input of the second stage. A variability of electrical parameter of the voltage source can be matched with a parameter of the amplification stage. The comparator can also include another switch between another voltage source and a third stage, with the two voltage sources providing different voltages. A comparator gain stage includes circuitry for deriving a differential current from the two voltages. Circuitry is also provided for loading the differential current to derive an amplified difference voltage. Further circuitry is provided for bypassing the loading circuitry to reduce a quiescent voltage drop associated with the loading circuitry.

    摘要翻译： CMOS比较器包括一个电容器，连接在两个放大级之间的电路中。 比较器还包括电压源，并且在电压源和第二级的输入之间提供开关。 电压源的电参数的可变性可以与放大级的参数相匹配。 比较器还可以包括另一个电压源和第三级之间的另一个开关，其中两个电压源提供不同的电压。 比较器增益级包括用于从两个电压导出差分电流的电路。 还提供电路以加载差分电流以导出放大的差分电压。 提供另外的电路用于旁路加载电路以减少与加载电路相关联的静态电压降。

    Gain enhancement technique for operational amplifiers
    9.
    发明公开
    Gain enhancement technique for operational amplifiers 失效
    操作维护者Verstärkung。

    公开(公告)号：EP0649218A1

    公开(公告)日：1995-04-19

    申请号：EP94307374.2

    申请日：1994-10-07

    申请人： Hewlett-Packard Company

    发明人： Badyal, Rajeev ,  Shu, Shao F.

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45179 ,  H03F3/45192 ,  H03F3/45636 ,  H03F3/45659 ,  H03F2203/45028 ,  H03F2203/45122 ,  H03F2203/45174 ,  H03F2203/45184 ,  H03F2203/45462 ,  H03F2203/45641 ,  H03F2203/45651

    摘要： A folded cascode operational amplifier using an improved gain enhancement technique is described. The folded cascode includes an input section, a cascode current mirror section, and a cascode current section. A first fully-differential operational amplifier is coupled to the cascode current mirror section to provide improved gain enhancement thereto and a second fully-differential operational amplifier is coupled to the cascode current source section to provide improved gain enhancement thereto. The differential inputs of the first fully-differential operational amplifier are coupled to feedback nodes of the cascode current mirror section and the differential outputs of the first fully-differential operational amplifier are coupled to control nodes of the cascode current mirror section. The differential inputs of the second fully-differential operational amplifier are coupled to feedback nodes of the cascode current source section and the differential outputs of the second fully-differential operational amplifier are coupled to control nodes of the cascode current mirror section. Coupling the feedback nodes of both current sources to a single fully-differential operational amplifier increases the common mode noise rejection of the corresponding section.

    摘要翻译： 描述了使用改进的增益增强技术的折叠共源共栅运算放大器。 折叠共源共栅包括输入部分，共源共栅电流镜部分和共源共栅电流部分。 第一全差分运算放大器耦合到共源共栅电流镜部分以提供改进的增益增益，并且第二全差分运算放大器耦合到共源共栅电流源部分以提供改进的增益增益。 第一全差分运算放大器的差分输入耦合到共源共栅电流镜部分的反馈节点，并且第一全差分运算放大器的差分输出耦合到共源共栅电流镜部分的控制节点。 第二全差分运算放大器的差分输入耦合到共源共栅电流源部分的反馈节点，第二全差分运算放大器的差分输出耦合到共源共栅电流镜部分的控制节点。 将两个电流源的反馈节点耦合到单个全差分运算放大器会增加相应部分的共模噪声抑制。

    INPUT FEED-FORWARD TECHNIQUE FOR CLASS AB AMPLIFIER
    10.
    发明公开
    INPUT FEED-FORWARD TECHNIQUE FOR CLASS AB AMPLIFIER 审中-公开
    输入前置放大器AB类放大器技术

    公开(公告)号：EP3244533A1

    公开(公告)日：2017-11-15

    申请号：EP17168350.1

    申请日：2017-04-27

    申请人： MediaTek Inc.

    发明人： TSAI, Hung-Chieh ,  LIN, Yu-Hsin

    IPC分类号： H03F3/45 ,  H03F1/02

    CPC分类号： H03F3/45695 ,  H03F1/0222 ,  H03F3/45 ,  H03F3/45179 ,  H03F3/45215 ,  H03F3/45228 ,  H03F2203/45024 ,  H03F2203/45462 ,  H03F2203/45504

    摘要： An amplifier (100) includes an amplifying stage (110), a cascoded circuit (102), an input feed-forward circuit (120) and an output stage (150). The amplifying stage (110) is arranged receiving a differential input pair to generate an amplified differential input pair. The input feed-forward circuit (120) is coupled to the cascoded circuit (102), and is arranged for feeding the differential input pair forward to the cascoded circuit (102). The output stage (150) is coupled to the amplifying stage (110) and the cascoded circuit (102), and is arranged for generating a differential output pair according to the amplified differential input pair and an output of the cascoded circuit (102).

    摘要翻译： 放大器（100）包括放大级（110），级联电路（102），输入前馈电路（120）和输出级（150）。 放大级（110）布置成接收差分输入对以生成放大的差分输入对。 输入前馈电路（120）耦合到级联电路（102），并且被布置用于将差分输入对向前馈送到级联电路（102）。 输出级（150）耦合到放大级（110）和级联电路（102），并且被布置用于根据放大的差分输入对和级联电路（102）的输出来生成差分输出对。