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    VOLTAGE REGULATION CIRCUIT
    1.
    发明公开
    VOLTAGE REGULATION CIRCUIT 审中-公开

    公开(公告)号：EP4443265A1

    公开(公告)日：2024-10-09

    申请号：EP24164192.7

    申请日：2024-03-18

    申请人： STMicroelectronics S.r.l.

    发明人： BIMBI, Cesare ,  PRIVITERA, Salvatore Giuseppe ,  PULVIRENTI, Francesco

    IPC分类号： G05F3/24 ,  G05F1/575

    CPC分类号： G05F3/24 ,  G05F1/575

    摘要： A voltage regulation circuit (20;20';60) receiving as input an input voltage (VCC), in particular a DC voltage supply, and outputting a regulated voltage (VREG),
    comprising a voltage reference circuit (50;90) configured to supply a reference voltage (VREF) which is independent, in particular with respect to temperature variations
    said voltage regulation circuit (20;20';60) comprising a first circuit branch (B1) and a second circuit branch (B2) in parallel coupled between said input voltage (VCC) and ground (GND),
    said first branch (B1) comprising
    a current generator (31; 71) comprising a first depletion MOSFET transistor (QD2), which gate source voltage is a PTAT (Proportional To Absolute Temperature) voltage, coupled between said input voltage (VCC) and the voltage reference circuit (50;90),
    said voltage reference circuit (50;90) comprising a first enhancement MOSFET transistor (QE2), which gate source voltage is a CTAT (Complementary To Absolute Temperature) voltage, coupled to the ground (GND) by its source through a source resistor (R5), on which a reference voltage (VREF), sum of the PTAT voltage drop (VP) on the source resistor (R5) and of the gate source voltage (VGS(QE2)) of the enhancement MOSFET transistor (QE2) being formed, said first enhancement MOSFET transistor (QE2) being arranged on said first branch (B1) and coupled by the drain to said first depletion MOSFET transistor (QD2) in a control node (C), said control node (C) being coupled to the gate of said first enhancement MOSFET transistor (QE2),
    said first depletion MOSFET transistor (QD2) injecting a PTAT current (ID2) in said first branch (B1) determining a PTAT voltage drop (VP) on said source resistor (R5),
    said second branch (B2) comprising an output stage (33; 73) coupled between said voltage to regulate (VCC) and an output node (REG) on which said regulated voltage (VREG) is taken, said output stage (33) comprising a second depletion MOSFET transistor (QD4) on which output is taken said output node (REG), a resistive voltage divider (40; 80) being coupled to said output node (REG), outputting on a respective divider output node (A) a divided output regulated voltage (VREG) which is inputted as the process variable of a negative feedback loop (QE2; 75) which is also coupled to said reference voltage (VREF), the output of said negative feedback loop (QE2; 75) controlling the gate of said second MOSFET transistor (QD4).

    DC/DC WANDLER MIT KASKADE AUS KONFIGURIERBARER LADUNGSPUMPE UND AUSGANGSLÄNGSREGLER FÜR HÖRGERÄTE
    2.
    发明公开
    DC/DC WANDLER MIT KASKADE AUS KONFIGURIERBARER LADUNGSPUMPE UND AUSGANGSLÄNGSREGLER FÜR HÖRGERÄTE 审中-公开

    公开(公告)号：EP4439946A1

    公开(公告)日：2024-10-02

    申请号：EP24164686.8

    申请日：2024-03-19

    申请人： Sivantos Pte. Ltd.

    发明人： MAI, Timo ,  DICKEL, Thomas

    IPC分类号： H02M1/00 ,  H02M3/07 ,  G05F1/56

    CPC分类号： H02M1/0045 ,  H02M1/007 ,  H02M3/072 ,  H02M1/0025 ,  G05F1/56

    摘要： Es wird eine Spannungsversorgung (14) für ein bestimmungsgemäß am Körper eines Nutzers getragenes elektronisches Gerät, insbesondere ein Hörinstrument (2), angegeben. Die Spannungsversorgung (14) umfasst eine Ladungspumpe (20) zur Wandlung einer Batteriespannung (UB) um einen Wandlungsfaktor zu einer Zwischenspannung (Uz), wobei die Ladungspumpe (20) zwischen mindestens zwei Stufen des Wandlungsfaktors umschaltbar ist. Die Spannungsversorgung (14) umfasst weiterhin einen Spannungsregler (26) zur Reduzierung der Zwischenspannung (Uz) auf eine Ausgangsspannung (UA) eines vorgegebenen Sollwerts (UR) sowie eine Steuerung (24) zur reversiblen Umschaltung der Ladungspumpe (20) zwischen den Stufen des Wandlungsfaktors. Die Steuerung (24) ist dabei dazu eingerichtet, die Ladungspumpe (20) nach Maßgabe einer Stellgröße (E) des Spannungsreglers (26) anzusteuern.

    POWER REGULATOR
    4.
    发明公开
    POWER REGULATOR 审中-实审

    公开(公告)号：EP4428650A1

    公开(公告)日：2024-09-11

    申请号：EP22890417.3

    申请日：2022-11-03

    申请人： Autonics Corporation

    发明人： KIM, Byoung Soo ,  LEE, Hee Sung

    IPC分类号： G05F1/66 ,  G01R19/175 ,  H02H3/08 ,  G08B21/18

    CPC分类号： H02H3/08 ,  G01R19/175 ,  G08B21/18 ,  G05F1/66

    摘要： A power regulator according to an embodiment of the present invention may comprise: a fuse module which includes first to third fuses, a thyristor module which includes first to third thyristors and controls power supplied to a load, a single-phase zero crossing detection unit which includes first to third photocouplers, a three-phase zero crossing detection unit which includes fourth to sixth photocouplers, and a switch unit which physically insulates the single-phase zero crossing detection unit and the three-phase zero crossing detection unit from each other.

    ADAPTIVE VOLTAGE SCALING OF RECEIVER
    8.
    发明公开
    ADAPTIVE VOLTAGE SCALING OF RECEIVER 审中-实审

    公开(公告)号：EP4372397A3

    公开(公告)日：2024-08-21

    申请号：EP24167938.0

    申请日：2018-12-12

    申请人： Kandou Labs S.A.

    发明人： TAJALLI, Armin

    IPC分类号： G01R31/30 ,  G05F1/10 ,  G06F1/26 ,  G05F1/46 ,  G06F1/324 ,  G06F1/3296

    CPC分类号： G01R31/3004 ,  G01R31/3016 ,  G06F1/3296 ,  G05F1/462 ,  G06F1/324 ,  Y02D10/00

    摘要： Obtaining a periodic test signal, sampling the periodic test signal using a sampling element according to a sampling clock to generate a sampled periodic output, the sampling element operating according to a supply voltage provided by a voltage regulator, the voltage regulator providing the supply voltage according to a supply voltage control signal, comparing the sampled periodic output to the sampling clock to generate a clock-to-Q measurement indicative of a delay value associated with the generation of the sampled periodic output in response to the sampling clock, generating the supply voltage control signal based at least in part on an average of the clock-to-Q measurement, and providing the supply voltage to a data sampling element connected to the voltage regulator, the data sampling element being a replica of the sampling element, the data sampling element sampling a stream of input data according to the sampling clock.