摘要:
A support apparatus and a support method are provided, the support apparatus includes: a support substrate (1) for bearing a supported component (2), the support substrate (1) having a first main surface (11) facing the supported component (2) and a second main surface (12) positioned on a side opposite to the first main surface (11); and a pressure distribution plate (3), arranged on the first main surface of the support substrate and positioned between the support substrate and the supported component, wherein the pressure distribution plate is configured to bring the supported component to be separated from the support substrate. Damage to the supported component in the process of separating the supported component from the support substrate can be avoided, and product yield is improved.
摘要:
The present invention relates to a method for recycling a substrate, especially a wafer, said substrate having a profile with a surface and a collar, wherein an interface provided between said surface and said collar has been formed by a previous separation step, and said profile is further planarised for obtaining a plane surface. In order to provide an improved method of the above-mentioned type which allows a substrate to be reused more often and enables the recycled substrate to be produced with a low total thickness variance, wherein a good planar surface quality is obtained, it is suggested that the method comprises a severing of the collar from said surface and said interface in a separate step.
摘要:
A method comprising: a deposition step comprising depositing a layer of graphene oxide; a deposition step comprising selectively exposing a region of the deposited graphene oxide layer to electromagnetic radiation to form a region of reduced graphene oxide adjacent to a neighbouring region of unexposed graphene oxide, the graphene oxide and adjacent reduced graphene oxide regions forming a junction therebetween to produce a graphene oxide-reduced graphene oxide junction layer; and repeating the deposition and exposure steps for one or more further respective layers of graphene oxide, over an underlying graphene oxide-reduced graphene oxide junction layer, to produce an apparatus in which the respective junctions of the graphene oxide-reduced graphene oxide layers, when considered together, extend in the third dimension.
摘要:
A process for producing a semiconductor device includes: forming an SiC epitaxial layer on an SiC substrate; implanting the epitaxial layer with ions; forming a gettering layer having a higher defect density than a defect density of the SiC substrate; and carrying out a heat treatment on the epitaxial layer. The semiconductor device includes an SiC substrate, an SiC epitaxial layer formed on the SiC substrate, and a gettering layer having a higher defect density than a defect density of the SiC substrate.
摘要:
Solar cells and methods for their manufacture are disclosed. An example method may include providing a p-type doped silicon substrate and introducing n-type dopant to a first and second region of the front surface of the substrate by ion implantation so that the second region is more heavily doped than the first region. The substrate may be subjected to a single high-temperature anneal cycle to activate the dopant, drive the dopant into the substrate, produce a p-n junction, and form a selective emitter. Oxygen may be introduced during the single anneal cycle to form in situ front and back passivating oxide layers. Fire-through of front and back contacts as well as metallization with contact connections may be performed in a single co-firing operation. Associated solar cells are also provided.
摘要:
In one embodiment, a power transistor device comprises a substrate that forms a PN junction with an overlying buffer layer. The power transistor device further includes a first region, a drift region that adjoins a top surface of the buffer layer, and a body region. The body region separates the first region from the drift region. First and second dielectric regions respectively adjoin opposing lateral sidewall portions of the drift region. The dielectric regions extend in a vertical direction from at least just beneath the body region down at least into the buffer layer. First and second field plates are respectively disposed in the first and second dielectric regions. A trench gate that controls forward conduction is disposed above the dielectric region adjacent to and insulated from the body region.
摘要:
Beschrieben wird ein Verfahren zur Herstellung einer n-dotierten Zone in einem Halbleiterwafer unter Verwendung einer Ionenimplantation und ein vertikales Halbleiterbauelement.