摘要:
Disclosed is an RC oscillator (300) comprising: a bias circuit (310), generating first and second bias currents (Ia, Ib), and outputting a charging current (IL) proportional to a total bias current that is the sum of the first and second bias currents, wherein the ratio (Ia/Ib) of the first bias current to the second bias current has a positive temperature coefficient; and an oscillation circuit (320), for periodically charging a capacitor (C0, C1) using the charging current output by the bias circuit, and using a voltage across a resistor (R2) through which the second bias current or a current proportional thereto flows as a reference voltage to compare with a charging voltage (Vcap) on the capacitor, so as to obtain a periodically oscillating clock signal (CLK, CLKB). Thus, the present disclosure can compensate the positive temperature coefficient of the subsequent delay and realize the RC oscillator with low temperature drift by making the charging time of the capacitor have a negative temperature coefficient.
摘要:
A signal generator configured to generate an oscillating signal with a temperature-compensated frequency. The signal generator includes a ring oscillator, and a complementary to absolute temperature (CTAT) current generator configured to generate a CTAT current for the ring oscillator to temperature-compensate the frequency of the oscillating signal.
摘要:
A method and apparatus for controlling a supply sensitivity of a ring oscillator stage are provided. The apparatus is configured to generate, via a voltage biasing module, a first bias signal for a PMOS biasing module based on a supply voltage and a second bias signal for a NMOS biasing module based on the supply voltage, bias, via the PMOS biasing module, triode PMOS degeneration of the inverting module based on the first bias signal, bias, via the NMOS biasing module, triode NMOS degeneration of the inverting module based on the second bias signal, receive an input via an inverting module, and output, via the inverting module, an inverted version of the received input based on the biased triode NMOS degeneration and the biased triode PMOS degeneration.
摘要:
It is described an oscillator circuit (1) comprising a first capacitor (c1) provided with a first terminal (16); a resistor (r) provided with a reference terminal (18); a first current generator (g1) provided with a connection terminal (14); a second current generator (g2) provided with a second connection terminal (15). Further, the circuit comprises a switching matrix (13) between the first (g1) and second generators (g2) and resistor (r) and the at least one first capacitor (c1).
摘要:
A thermally-compensated oscillator (12) has a current reference (9) with an output current which relates to an ambient temperature with a first relationship, a ring oscillator (10) having an operating frequency which relates to the ambient temperature with a second relationship, and which receives the output current of the current reference (9) and outputs an oscillator signal, and a level shifter (11) which receives the oscillator signal from the ring oscillator (10) and outputs a corresponding voltage-regulated clock signal (CLK).
摘要:
An integrated circuit incorporating a bias circuit for a current-controlled oscillator (ICO) with improved power supply rejection ratio (PSRR) is described. The bias circuit for the ICO includes two error amplifiers. The first error amplifier regulates the bias voltage, VBN, referenced to a ground supply (GND). The second error amplifier regulates the bias voltage, VBP, referenced to a positive power supply (VDD). The VBP and VBN bias voltages have improved PSRR relative to conventional ICO bias circuits for noise injected into VDD and GND.