Fully-differential amplifier, photoelectric conversion apparatus employing the same, and imaging system
    3.
    发明专利
    Fully-differential amplifier, photoelectric conversion apparatus employing the same, and imaging system 有权
    全差分放大器,使用其的光电转换装置和成像系统

    公开(公告)号:JP2011091774A

    公开(公告)日:2011-05-06

    申请号:JP2009245812

    申请日:2009-10-26

    发明人: ITANO TETSUYA

    IPC分类号: H03F3/45 H04N5/335

    摘要: PROBLEM TO BE SOLVED: To provide a fully-differential amplifier capable of easily setting a power supply voltage VDD low while maintaining a signal amplitude, or expanding an amplitude of an output signal without increasing the power supply voltage VDD.
    SOLUTION: A fully-differential amplifier includes a voltage-current conversion unit C100, a first current-voltage conversion unit C101, and a second current-voltage conversion unit C102. A resistant element R100 included in the voltage-current conversion unit C100 and a resistant element R102 included in the first current-voltage conversion unit C101, and a resistant element R101 included in the voltage-current conversion unit C100 and a resistant element R103 included in the second current-voltage conversion unit C102 are connected in parallel with each other between a source terminal of a forward-phase input transistor P100 and a power supply terminal, and between a source terminal of an inverting input transistor P101 and the power supply terminal, respectively.
    COPYRIGHT: (C)2011,JPO&INPIT

    摘要翻译: 要解决的问题:提供一种能够在维持信号幅度的同时容易地将电源电压VDD设置为低电平,或者在不增加电源电压VDD的情况下扩大输出信号的幅度的全差分放大器。 解决方案:全差分放大器包括电压 - 电流转换单元C100,第一电流 - 电压转换单元C101和第二电流 - 电压转换单元C102。 包括在电压电流转换单元C100中的电阻元件R100和包括在第一电流电压转换单元C101中的电阻元件R102以及包括在电压电流转换单元C100中的电阻元件R101和包括在电压电流转换单元C1101中的电阻元件R103 第二电流电压转换单元C102在正相输入晶体管P100的源极端子和电源端子之间并且在反相输入晶体管P101的源极端子与电源端子之间并联连接, 分别。 版权所有(C)2011,JPO&INPIT

    Semiconductor integrated circuit
    4.
    发明专利
    Semiconductor integrated circuit 审中-公开
    半导体集成电路

    公开(公告)号:JP2007201236A

    公开(公告)日:2007-08-09

    申请号:JP2006018876

    申请日:2006-01-27

    摘要: PROBLEM TO BE SOLVED: To increase operation speed and reduce power consumption in a circuit using an SOI-type MOS transistor. SOLUTION: In a plurality of MOS transistors of an SOI structure, body floating, a fixed body voltage, and a variable body voltage are combined. The body floating, body fixed voltage, and variable body bias may be adopted for cases where high-speed operation is expected in a logical circuit mainly composed of switching operation while an operating power supply is at a relatively low voltage, the kink phenomenon of current/voltage characteristics is hated essentially as in an analog-based circuit, and high-speed operation is required in an active state and low power consumption is required in a standby state as in a logical circuit, respectively. By combining the body floating, fixed body voltage, and variable body voltage transistors, an accurate body bias can be adopted according to the functions and configurations of the circuit for high-speed operation and low power consumption. COPYRIGHT: (C)2007,JPO&INPIT

    摘要翻译: 要解决的问题:提高使用SOI型MOS晶体管的电路的运行速度和降低功耗。 解决方案:在SOI结构的多个MOS晶体管中,组合体浮动,固定体电压和可变体电压。 在工作电源处于相对低电压的主要由开关操作组成的逻辑电路中预期高速运行的情况下,可以采用主体浮动,车体固定电压和可变体偏置,电流的扭结现象 /电压特性基本上如在基于模拟的电路中那样讨厌,而在活动状态下需要高速运行,并且在待机状态下分别需要在逻辑电路中低功耗。 通过组合主体浮动,固定体电压和可变体电压晶体管,可以根据电路的功能和配置采用精确的体偏置,实现高速运行和低功耗。 版权所有(C)2007,JPO&INPIT