利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

7 条记录 (耗时 0.011 秒)

    Fully-differential amplifier circuit
    1.
    发明专利
    Fully-differential amplifier circuit 有权
    全差分放大器电路

    公开(公告)号：JP2010288266A

    公开(公告)日：2010-12-24

    申请号：JP2010099067

    申请日：2010-04-22

    申请人： Canon Inc ,  キヤノン株式会社

    发明人： ISODA NAOKI

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45183 ,  H03F3/3022 ,  H03F3/45645 ,  H03F2203/30015 ,  H03F2203/45134 ,  H03F2203/45404 ,  H03F2203/45421 ,  H03F2203/45422 ,  H03F2203/45512 ,  H03F2203/45514 ,  H03F2203/45534 ,  H03F2203/45544 ,  H03F2203/45551 ,  H03F2203/45616 ,  H03F2203/45626 ,  H03F2203/45702

    摘要： PROBLEM TO BE SOLVED: To reduce power consumption in performing common mode feedback operation in a fully-differential amplifier circuit.
    SOLUTION: The fully-differential amplifier circuit includes: a differential amplifier configured to differentially amplify first and second input signals forming an input differential pair to generate first and second intermediate signals forming a pair; and first and second class AB amplifiers configured to amplify the first and second intermediate signals to generate first and second output signals, respectively. The first and second output signals form an output differential pair, the first class AB amplifier amplifies the first intermediate signal based on a reference voltage adjusted by a first feedback signal that is a common mode component of the first output signal and the second output signal. The second class AB amplifier amplifies the second intermediate signal based on a reference voltage adjusted by a second feedback signal that is a common mode component of the first output signal and the second output signal.
    COPYRIGHT: (C)2011,JPO&INPIT

    摘要翻译： 要解决的问题：为了降低在全差分放大器电路中执行共模反馈操作的功耗。 解决方案：全差分放大器电路包括：差分放大器，被配置为差分放大形成输入差分对的第一和第二输入信号，以产生形成一对的第一和第二中间信号; 以及配置成放大第一和第二中间信号以分别产生第一和第二输出信号的第一和第二AB类放大器。 第一和第二输出信号形成输出差分对，第一类AB放大器基于由作为第一输出信号和第二输出信号的共模分量的第一反馈信号调整的参考电压放大第一中间信号。 第二类AB放大器基于由作为第一输出信号和第二输出信号的共模分量的第二反馈信号调整的参考电压放大第二中间信号。 版权所有（C）2011，JPO＆INPIT

    Discrete time amplifier circuit and analog-digital converter
    2.
    发明专利
    Discrete time amplifier circuit and analog-digital converter 审中-公开
    离散时间放大器电路和模拟数字转换器

    公开(公告)号：JP2009118049A

    公开(公告)日：2009-05-28

    申请号：JP2007287217

    申请日：2007-11-05

    申请人： Panasonic Corp ,  パナソニック株式会社

    发明人： AKIZUKI TAIJI ,  ADACHI HISASHI ,  MAEDA CHIKO

    IPC分类号： H03F3/45 ,  H03M1/12

    CPC分类号： H03F3/45475 ,  H03F3/45183 ,  H03F3/45946 ,  H03F2200/411 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03F2203/45421 ,  H03F2203/45424 ,  H03F2203/45512 ,  H03F2203/45551 ,  H03F2203/45634 ,  H03M1/1245

    摘要： PROBLEM TO BE SOLVED: To attain simplified circuit and low current consumption in a discrete time amplifier circuit and an AD converter, to improve convergence from a transient response state to a steady state of the amplifier circuit and to reduce noise and distortion owing to variation in output common-mode voltage. SOLUTION: The discrete time amplifier circuit and the AD converter are provided with a switched-capacitor common-mode feedback (CMFB) circuit 2 capable of detecting and feeding back the output common-mode voltage at every sampling in the case that the circuit operates at double sampling timing (the circuit operates by every half period). COPYRIGHT: (C)2009,JPO&INPIT

    摘要翻译： 要解决的问题：为了在离散时间放大器电路和AD转换器中实现简化的电路和低电流消耗，以改善从瞬态响应状态到放大器电路的稳定状态的收敛，并且减少由于 输出共模电压的变化。 解决方案：离散时间放大器电路和AD转换器设置有开关电容共模反馈（CMFB）电路2，其能够在每次采样时检测并反馈输出共模电压， 电路工作在双采样定时（电路每半个周期运行）。 版权所有（C）2009，JPO＆INPIT

    Amplifier circuit, signal processor circuit, and semiconductor integrated circuit device
    5.
    发明专利
    Amplifier circuit, signal processor circuit, and semiconductor integrated circuit device 有权
    放大器电路，信号处理器电路和半导体集成电路器件

    公开(公告)号：JP2011217252A

    公开(公告)日：2011-10-27

    申请号：JP2010085151

    申请日：2010-04-01

    申请人： Denso Corp ,  株式会社デンソー

    发明人： HONDA KAZUTAKA ,  MAKIHARA TETSUYA ,  HORIE MASUMI

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45183 ,  H03F3/45192 ,  H03F3/45659 ,  H03F2200/261 ,  H03F2203/45404 ,  H03F2203/45421 ,  H03F2203/45424 ,  H03F2203/45434 ,  H03F2203/45512 ,  H03F2203/45514 ,  H03F2203/45544 ,  H03F2203/45726 ,  H03F2203/45728

    摘要： PROBLEM TO BE SOLVED: To provide an amplifier circuit to be switchable between a single end output configuration and a differential output configuration without increasing a circuit area.SOLUTION: When switches S1 and S4 are turned off and a switch S2 is turned on, a load circuit 11 functions as an active load on a differential pair 7 and an output terminal 12 is internally disconnected. Thus, an amplifier circuit 1 is provided with a single end output configuration, differentially amplifies input voltages Vinp and Vinm input to input terminals 8 and 9 and outputs an imbalanced signal Vo from an output terminal 13. When the switches S1 and S4 are turned on and the switch S2 is turned off, the load circuit 11 functions as a load of the differential pair 7, and the output terminal 12 is internally connected. Thus, the amplifier circuit 1 is provided with a differential output configuration, differentially amplifies the input voltages Vinp and Vinm input to the input terminals 8 and 9 and outputs balanced signals Vom and Vop from the output terminals 12 and 13.

    摘要翻译： 要解决的问题：提供在单端输出配置和差分输出配置之间可切换的放大器电路，而不增加电路面积。解决方案：当开关S1和S4关闭并且开关S2接通时，负载 电路11用作差分对7上的有源负载，并且输出端子12在内部断开。 因此，放大器电路1具有单端输出配置，差分放大输入到输入端子8和9的输入电压Vinp和Vinm，并从输出端子13输出不平衡信号Vo。当开关S1和S4接通时 并且开关S2断开时，负载电路11用作差分对7的负载，并且输出端子12内部连接。 因此，放大器电路1被提供有差分输出配置，差分放大输入到输入端子8和9的输入电压Vinp和Vinm，并从输出端子12和13输出平衡信号Vom和Vop。