公开(公告)号：KR101798657B1

公开(公告)日：2017-11-16

申请号：KR1020110024061

申请日：2011-03-17

申请人： 스태츠 칩팩 피티이. 엘티디.

发明人： 펜세,라젠드라디.

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L24/17 ,  H01L21/56 ,  H01L21/563 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/528 ,  H01L24/03 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/09133 ,  H01L2224/09135 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13016 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/17133 ,  H01L2224/27013 ,  H01L2224/274 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48157 ,  H01L2224/48158 ,  H01L2224/4816 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/812 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： 반도체소자는다이패드레이아웃을구비한반도체다이를갖는다. 다이패드레이아웃의신호패드가반도체다이주변근처에주로위치되고, 동력및 접지패드가신호패드로부터내측에주로위치된다. 신호패드는반도체다이에지에일반적으로평행한주변의열 또는주변의어레이에배열된다. 범프가신호패드, 동력패드및 접지패드위에형성된다. 상기범프는가용성부및 비가용성부를가질수 있다. 상호접속사이트를구비한전도성트레이스가기판위에형성된다. 법프는상호접속사이트보다넓다. 범프는상호접속사이트의정상면및 측면을커버하도록상호접속사이트에본딩된다. 봉지재가반도체다이및 기판사이의범프주위에증착된다.

公开(公告)号：KR1020120061712A

公开(公告)日：2012-06-13

申请号：KR1020110024061

申请日：2011-03-17

申请人： 스태츠 칩팩 피티이. 엘티디.

发明人： 펜세,라젠드라디.

IPC分类号： H01L23/48 ,  H01L21/60

CPC分类号： H01L24/17 ,  H01L21/56 ,  H01L21/563 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/528 ,  H01L24/03 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/09133 ,  H01L2224/09135 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13016 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/17133 ,  H01L2224/27013 ,  H01L2224/274 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48157 ,  H01L2224/48158 ,  H01L2224/4816 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81191 ,  H01L2224/812 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L23/48 ,  H01L23/481

摘要： PURPOSE: A semiconductor device and a manufacturing method thereof are provided to improve performance of a package by reducing a via number. CONSTITUTION: A signal pad of a die pad layout is located near a semiconductor die(58). Power and grounding pads are located on an inner side from the signal pad. The signal pad is arranged on a neighboring array or a neighboring column parallel to a semiconductor die edge. Bumps(110,112) are formed on the signal pad, the power pad, and the grounding pad. A conductive trace which includes an interconnection site is formed on a substrate. The bump is combined with the interconnection site in order to cover a side surface and the top surface of the interconnection site. An encapsulating material is electroplated near the bump between the substrate and the semiconductor die.

摘要翻译： 目的：提供半导体器件及其制造方法，以通过减少通孔数来改善封装的性能。 构成：芯片焊盘布局的信号焊盘位于半导体管芯（58）附近。 电源和接地焊盘位于信号垫的内侧。 信号焊盘布置在平行于半导体管芯边缘的相邻阵列或相邻列上。 在信号焊盘，电源焊盘和接地焊盘上形成凸起（110,112）。 在基板上形成包括互连部位的导电迹线。 凸块与互连部位组合以覆盖互连部位的侧表面和顶表面。 在衬底和半导体管芯之间的凸块附近电镀封装材料。