公开(公告)号：US10090278B2

公开(公告)日：2018-10-02

申请号：US15393754

申请日：2016-12-29

Applicant: Sang-Sick Park ,  Geol Nam ,  Tae Hong Min ,  Jihwan Hwang

Inventor： Sang-Sick Park ,  Geol Nam ,  Tae Hong Min ,  Jihwan Hwang

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/00

Abstract: A semiconductor package includes a plurality of semiconductor chips on a substrate. The semiconductor chips include a first semiconductor chip, a second semiconductor chip, and a third semiconductor chip that are sequentially stacked on the substrate. The semiconductor package further includes a plurality of non-conductive layers between the substrate and the first semiconductor chip and between adjacent semiconductor chips among the semiconductor chips. The semiconductor chips include smaller widths as a distance from the substrate increases. Each of the non-conductive layers includes an extension protruding outward from a side surface of an overlying one of the semiconductor chips.

公开(公告)号：US20170243856A1

公开(公告)日：2017-08-24

申请号：US15393754

申请日：2016-12-29

Applicant: Sang-Sick PARK ,  Geol NAM ,  Tae Hong MIN ,  Jihwan HWANG

Inventor： Sang-Sick PARK ,  Geol NAM ,  Tae Hong MIN ,  Jihwan HWANG

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L23/49827 ,  H01L24/17 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13117 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16113 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/9211 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06586 ,  H01L2924/01058 ,  H01L2924/0665 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2224/83 ,  H01L2224/81

Abstract: A semiconductor package includes a plurality of semiconductor chips on a substrate. The semiconductor chips include a first semiconductor chip, a second semiconductor chip, and a third semiconductor chip that are sequentially stacked on the substrate. The semiconductor package further includes a plurality of non-conductive layers between the substrate and the first semiconductor chip and between adjacent semiconductor chips among the semiconductor chips. The semiconductor chips include smaller widths as a distance from the substrate increases. Each of the non-conductive layers includes an extension protruding outward from a side surface of an overlying one of the semiconductor chips.