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1.发明授权Power consumption optimized translation of object code partitioned for hardware component based on identified operations 有权基于识别的操作，针对硬件组件划分的目标代码的功耗优化转换公开(公告)号：US09098309B2
公开(公告)日：2015-08-04
申请号：US13303841
申请日：2011-11-23
CPC分类号： G06F8/4432 , G06F8/447 , G06F9/45516 , G06F9/45525 , Y02D10/41
摘要： In the various aspects, a virtual machine operating at the machine layer may use power consumption models to partition object code into portions, identify the relative power efficiencies of the mobile device processors for the various code portions, and route the code portions to the mobile device processors that can perform the operations using the least amount of energy. A dynamic binary translator process may translate the object code portions into an instruction set language supported by the hardware component identified as being preferred. The code portions may be executed and the amount of power consumed may be measured, with the measurements used to generate and/or update performance and power consumption models.
摘要翻译： 在各个方面，在机器层操作的虚拟机可以使用功耗模型来将目标代码分成多个部分，识别各种代码部分的移动设备处理器的相对功率效率，并将代码部分路由到移动设备 处理器可以使用最少量的能量执行操作。 动态二进制转换器过程可以将目标代码部分转换为被识别为优选的硬件组件所支持的指令集语言。 可以执行代码部分并且可以测量消耗的功率量，其中用于生成和/或更新性能和功耗模型的测量结果。
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公开(公告)号：US08959277B2
公开(公告)日：2015-02-17
申请号：US12334316
申请日：2008-12-12
CPC分类号： G06F8/52 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/384 , G06F9/3857 , G06F9/3863
摘要： One embodiment of the present invention provides a system that facilitates precise exception semantics for a virtual machine. During operation, the system executes a program in the virtual machine using a processor that includes a gated store buffer that stores values to be written to a memory. This gated store buffer is configured to delay a store to the memory until after a speculatively-optimized region of the program commits. The processor signals an exception when it detects that a load following the store is attempting to access the same memory region being written by the store prior to the commitment of the speculatively-optimized region.
摘要翻译： 本发明的一个实施例提供一种促进虚拟机的精确异常语义的系统。 在操作期间，系统使用包括存储要写入存储器的值的门控存储缓冲器的处理器在虚拟机中执行程序。 该门控存储缓冲器配置为将存储器延迟到存储器，直到程序的推测优化区域提交。 处理器在检测到存储器之后的负载尝试访问由推测优化区域承诺之前由存储器写入的相同存储区域时，发出异常。
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公开(公告)号：US08893104B2
公开(公告)日：2014-11-18
申请号：US13409852
申请日：2012-03-01
IPC分类号： G06F9/45
CPC分类号： G06F8/441
摘要： The aspects enable a computing device to allocate memory space to variables during runtime compilation of a software application. A compiler may be modified to identify operations that can be performed on either a main pipe or an alternative pipe, identify chains of related operations that can be performed on either the main pipe or the alternative pipe, identify points in the execution of code at which the number of live values will exceed the number of registers, and choosing a chain of operations as a candidate to be moved to the alternative pipe in order to reduce the number of live values at identified points in the execution of code. The entire chosen chain of operations may be moved to the alternative pipe. The alternative pipe may perform the computations and return the results to the main pipe for execution.
摘要翻译： 这些方面使计算设备能够在软件应用程序的运行时编译期间向存储空间分配内存空间。 可以修改编译器以识别可以在主管道或替代管道上执行的操作，识别可以在主管道或备用管道上执行的相关操作的链路，识别执行代码的点，其中 实时值的数量将超过寄存器的数量，并选择一连串的操作作为替代管道的候选者，以便减少执行代码中识别点的实时值的数量。 整个选择的操作链可以移动到替代管道。 替代管道可以执行计算，并将结果返回到主管道执行。
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公开(公告)号：US08726248B2
公开(公告)日：2014-05-13
申请号：US12138088
申请日：2008-06-12
CPC分类号： G06F8/52 , G06F8/40 , G06F8/441 , G06F8/4441 , G06F8/447 , G06F9/4552 , G06F12/00
摘要： One embodiment of the present invention provides a system that improves program performance by enregistering memory locations. During operation, the system receives program object code which has been generated to use a specified number of registers that are available for a given target hardware implementation. Next, the system translates this object code to execute on a second hardware implementation which includes more registers than the first hardware implementation. The system uses these additional registers to improve the performance of the translated object code for the second hardware implementation. More specifically, the system identifies a memory access in the object code, and then rewrites an instruction associated with this memory access to access an available register instead of the original target memory location. To preserve program semantics, the system subsequently moderates accesses to the memory location to ensure that no threads access a stale value in the enregistered memory location.
摘要翻译： 本发明的一个实施例提供了一种通过注册存储器位置来改进程序性能的系统。 在操作期间，系统接收已经生成的程序对象代码，以使用可用于给定目标硬件实现的指定数量的寄存器。 接下来，系统将该目标代码转换为在第二硬件实现上执行，该第二硬件实现包括比第一硬件实现更多的寄存器。 系统使用这些附加寄存器来提高第二个硬件实现的转换目标代码的性能。 更具体地，系统识别目标代码中的存储器访问，然后重写与该存储器访问相关联的指令以访问可用寄存器而不是原始目标存储器位置。 为了保存程序语义，系统随后缓和对存储器位置的访问，以确保没有线程访问注册内存位置中的陈旧值。
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公开(公告)号：US20130198495A1
公开(公告)日：2013-08-01
申请号：US13409852
申请日：2012-03-01
IPC分类号： G06F9/30
CPC分类号： G06F8/441
摘要： The aspects enable a computing device to allocate memory space to variables during runtime compilation of a software application. A compiler may be modified to identify operations that can be performed on either a main pipe or an alternative pipe, identify chains of related operations that can be performed on either the main pipe or the alternative pipe, identify points in the execution of code at which the number of live values will exceed the number of registers, and choosing a chain of operations as a candidate to be moved to the alternative pipe in order to reduce the number of live values at identified points in the execution of code. The entire chosen chain of operations may be moved to the alternative pipe. The alternative pipe may perform the computations and return the results to the main pipe for execution.
摘要翻译： 这些方面使计算设备能够在软件应用程序的运行时编译期间向存储空间分配内存空间。 可以修改编译器以识别可以在主管道或替代管道上执行的操作，识别可以在主管道或备用管道上执行的相关操作的链路，识别执行代码的点，其中 实时值的数量将超过寄存器的数量，并选择一连串的操作作为替代管道的候选者，以便减少执行代码中识别点的实时值的数量。 整个选择的操作链可以移动到替代管道。 替代管道可以执行计算，并将结果返回到主管道执行。
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公开(公告)号：US08453128B2
公开(公告)日：2013-05-28
申请号：US11864847
申请日：2007-09-28
IPC分类号： G06F9/44
CPC分类号： G06F9/45516
摘要： A method for implementing a just-in-time compiler involves obtaining high-level code templates in a high-level programming language, where the high-level programming language is designed for compilation to an intermediate language capable of execution by a virtual machine, and where each high-level code template represents an instruction in the intermediate language. The method further involves compiling the high-level code templates to native code to obtain optimized native code templates, where compiling the high-level code templates is performed, prior to runtime, using an optimizing static compiler designed for runtime use with the virtual machine. The method further involves implementing the just-in-time compiler using the optimized native code templates, where the just-in-time compiler is configured to substitute an optimized native code template when a corresponding instruction in the intermediate language is encountered at runtime.
摘要翻译： 用于实现即时编译器的方法包括以高级编程语言获得高级代码模板，其中高级编程语言被设计用于编译能够由虚拟机执行的中间语言，以及 其中每个高级代码模板代表中间语言的指令。 该方法还包括将高级代码模板编译为本地代码以获得优化的本机代码模板，其中在运行时使用为虚拟机运行时使用设计的优化静态编译器执行高级代码模板的编译。 该方法还涉及使用优化的本机代码模板来实现即时编译器，其中当在运行时遇到中间语言的对应指令时，即时编译器被配置为替换优化的本地代码模板。
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公开(公告)号：US20130080805A1
公开(公告)日：2013-03-28
申请号：US13303841
申请日：2011-11-23
IPC分类号： G06F1/32
CPC分类号： G06F8/4432 , G06F8/447 , G06F9/45516 , G06F9/45525 , Y02D10/41
摘要： In the various aspects, a virtual machine operating at the machine layer may use power consumption models to partition object code into portions, identify the relative power efficiencies of the mobile device processors for the various code portions, and route the code portions to the mobile device processors that can perform the operations using the least amount of energy. A dynamic binary translator process may translate the object code portions into an instruction set language supported by the hardware component identified as being preferred. The code portions may be executed and the amount of power consumed may be measured, with the measurements used to generate and/or update performance and power consumption models.
摘要翻译： 在各个方面，在机器层操作的虚拟机可以使用功耗模型来将目标代码分成多个部分，识别各种代码部分的移动设备处理器的相对功率效率，并将代码部分路由到移动设备 处理器可以使用最少量的能量执行操作。 动态二进制转换器过程可以将目标代码部分转换为被识别为优选的硬件组件所支持的指令集语言。 可以执行代码部分并且可以测量消耗的功率量，其中用于生成和/或更新性能和功耗模型的测量结果。
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8.发明申请公开(公告)号：US20100333090A1
公开(公告)日：2010-12-30
申请号：US12495367
申请日：2009-06-30
CPC分类号： G06F9/45558 , G06F9/45516 , G06F9/45554 , G06F2009/45583
摘要： One embodiment provides a system that protects translated guest program code in a virtual machine that supports self-modifying program code. While executing a guest program in the virtual machine, the system uses a guest shadow page table associated with the guest program and the virtual machine to map a virtual memory page for the guest program to a physical memory page on the host computing device. The system then uses a dynamic compiler to translate guest program code in the virtual memory page into translated guest program code (e.g., native program instructions for the computing device). During compilation, the dynamic compiler stores in a compiler shadow page table and the guest shadow page table information that tracks whether the guest program code in the virtual memory page has been translated. The compiler subsequently uses the information stored in the guest shadow page table to detect attempts to modify the contents of the virtual memory page. Upon detecting such an attempt, the system invalidates the translated guest program code associated with the virtual memory page.
摘要翻译： 一个实施例提供一种保护支持自修改程序代码的虚拟机中的翻译的客户机程序代码的系统。 当在虚拟机中执行访客程序时，系统使用与访客程序和虚拟机相关联的来宾影子页面表将客机程序的虚拟存储器页面映射到主计算设备上的物理存储器页面。 然后，系统使用动态编译器将虚拟存储器页面中的客户程序代码翻译成客户程序代码（例如，用于计算设备的本地程序指令）。 在编译期间，动态编译器存储在编译器影子页表中，并且客户影子页表信息跟踪虚拟内存页中的访客程序代码是否已被翻译。 编译器随后使用存储在客人影子页表中的信息来检测修改虚拟内存页面内容的尝试。 在检测到这样的尝试时，系统使与虚拟存储器页面相关联的经翻译的访客程序代码无效。
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公开(公告)号：US20100153662A1
公开(公告)日：2010-06-17
申请号：US12334316
申请日：2008-12-12
IPC分类号： G06F12/00
CPC分类号： G06F8/52 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/384 , G06F9/3857 , G06F9/3863
摘要： One embodiment of the present invention provides a system that facilitates precise exception semantics for a virtual machine. During operation, the system executes a program in the virtual machine using a processor that includes a gated store buffer that stores values to be written to a memory. This gated store buffer is configured to delay a store to the memory until after a speculatively-optimized region of the program commits. The processor signals an exception when it detects that a load following the store is attempting to access the same memory region being written by the store prior to the commitment of the speculatively-optimized region.
摘要翻译： 本发明的一个实施例提供一种促进虚拟机的精确异常语义的系统。 在操作期间，系统使用包括存储要写入存储器的值的门控存储缓冲器的处理器在虚拟机中执行程序。 该门控存储缓冲器配置为将存储器延迟到存储器，直到程序的推测优化区域提交。 处理器在检测到存储器之后的负载尝试访问由推测优化区域承诺之前由存储器写入的相同存储区域时，发出异常。
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公开(公告)号：US20100042983A1
公开(公告)日：2010-02-18
申请号：US12190490
申请日：2008-08-12
IPC分类号： G06F9/45
CPC分类号： G06F9/45516 , G06F9/45533
摘要： A system and method are provided for inlining a program call between processes executing under separate ISAs (Instruction Set Architectures) within a system virtual machine. The system virtual machine hosts any number of virtual operating system instances, each of which may execute any number of applications. The system virtual machine interprets or dynamically compiles not only application code executing under virtual operating systems, but also the virtual operating systems. For a program call that crosses ISA boundaries, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the virtual ISA of the code. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions are configured and executed (or emulated) to perform as they would within the virtual ISA.
摘要翻译： 提供了一种系统和方法，用于在系统虚拟机内的单独的ISA（指令集架构）下执行的进程之间内联程序调用。 系统虚拟机托管任何数量的虚拟操作系统实例，每个虚拟操作系统实例可以执行任意数量的应用程序。 系统虚拟机不仅解释或动态编译在虚拟操作系统下运行的应用程序代码，还可以动态地编译虚拟操作系统。 对于跨越ISA边界的程序调用，虚拟机组装跨越边界的中间表示（IR）图。 通过识别代码的虚拟ISA的信息来增强对应于呼叫两侧的代码的区域节点。 IR被优化并用于在虚拟机的本机ISA（指令集架构）中生成指令。 单独的指令被配置和执行（或仿真）以像在虚拟ISA内一样执行。
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