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公开(公告)号：US08281296B2
公开(公告)日：2012-10-02
申请号：US12190490
申请日：2008-08-12
IPC分类号： G06F9/45
CPC分类号： G06F9/45516 , G06F9/45533
摘要： A system and method are provided for inlining a program call between processes executing under separate ISAs (Instruction Set Architectures) within a system virtual machine. The system virtual machine hosts any number of virtual operating system instances, each of which may execute any number of applications. The system virtual machine interprets or dynamically compiles not only application code executing under virtual operating systems, but also the virtual operating systems. For a program call that crosses ISA boundaries, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the virtual ISA of the code. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions are configured and executed (or emulated) to perform as they would within the virtual ISA.
摘要翻译： 提供了一种系统和方法，用于在系统虚拟机内的单独的ISA（指令集架构）下执行的进程之间内联程序调用。 系统虚拟机托管任何数量的虚拟操作系统实例，每个虚拟操作系统实例可以执行任意数量的应用程序。 系统虚拟机不仅解释或动态编译在虚拟操作系统下运行的应用程序代码，还可以动态地编译虚拟操作系统。 对于跨越ISA边界的程序调用，虚拟机组装跨越边界的中间表示（IR）图。 通过识别代码的虚拟ISA的信息来增强对应于呼叫两侧的代码的区域节点。 IR被优化并用于在虚拟机的本机ISA（指令集架构）中生成指令。 单独的指令被配置和执行（或仿真）以像在虚拟ISA内一样执行。
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公开(公告)号：US20100250870A1
公开(公告)日：2010-09-30
申请号：US12415905
申请日：2009-03-31
IPC分类号： G06F12/00
CPC分类号： G06F12/1027 , G06F12/084
摘要： One embodiment of the present invention provides a system that tracks enregistered memory locations. During operation, the system receives program object code that enregisters a memory location (e.g., a set of data at a given memory address). Next, the system executes this program object code using a thread. After enregistering the memory location, the system tracks the associated memory address and a thread identifier for the thread in a table that identifies enregistered memory locations. The system checks this table during memory accesses to ensure that other threads attempting to access an enregistered memory location receive a current value for the enregistered memory location.
摘要翻译： 本发明的一个实施例提供了一种跟踪登记的存储器位置的系统。 在操作期间，系统接收记录存储器位置的程序对象代码（例如，给定存储器地址处的一组数据）。 接下来，系统使用线程执行该程序对象代码。 在注册存储器位置之后，系统跟踪相关联的存储器地址和用于标识注册的存储器位置的表中的线程的线程标识符。 在内存访问期间，系统会检查此表，以确保尝试访问注册内存位置的其他线程接收注册内存位置的当前值。
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公开(公告)号：US20100153690A1
公开(公告)日：2010-06-17
申请号：US12334183
申请日：2008-12-12
IPC分类号： G06F9/30
CPC分类号： G06F9/30123 , G06F9/3004 , G06F9/30087 , G06F9/384 , G06F9/3842 , G06F9/3857 , G06F9/3863
摘要： One embodiment of the present invention provides a system that facilitates precise exception semantics. The system includes a processor that uses register rename maps to support out-of-order execution, where the register rename maps track mappings between native architectural registers and physical registers for a program executing on the processor. These register rename maps include: 1) a working rename map that maps architectural registers associated with a decoded instruction to corresponding physical registers; 2) a retire rename map that tracks and preserves a set of physical registers that are associated with retired instructions; and 3) a checkpoint rename map that stores a mapping between a set of architectural registers and a set of physical registers for a preceding checkpoint in the program. When the program signals an exception, the processor uses the checkpoint rename map to roll back program execution to the preceding checkpoint.
摘要翻译： 本发明的一个实施例提供了一种有助于精确异常语义的系统。 该系统包括一个使用寄存器重命名映射来支持无序执行的处理器，其中寄存器重命名映射本机结构寄存器和物理寄存器之间的跟踪映射，以便在处理器上执行的程序。 这些寄存器重命名映射包括：1）将与解码指令相关联的架构寄存器映射到对应的物理寄存器的工作重命名映射; 2）一个退休重命名映射，用于跟踪和保留与退休指令相关联的一组物理寄存器; 以及3）检查点重命名映射，其存储在一组结构寄存器和用于程序中前一检查点的一组物理寄存器之间的映射。 当程序发出异常时，处理器使用检查点重命名映射将程序执行回滚到上一个检查点。
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公开(公告)号：US20090313612A1
公开(公告)日：2009-12-17
申请号：US12138088
申请日：2008-06-12
IPC分类号： G06F9/45
CPC分类号： G06F8/52 , G06F8/40 , G06F8/441 , G06F8/4441 , G06F8/447 , G06F9/4552 , G06F12/00
摘要： One embodiment of the present invention provides a system that improves program performance by enregistering memory locations. During operation, the system receives program object code which has been generated for a given hardware implementation, and hence is optimized to use a specified number of registers that are available in that hardware implementation. Next, the system translates this object code to execute on a second hardware implementation which includes more registers than the first hardware implementation. The system makes use of these additional registers to improve the performance of the translated object code for the second hardware implementation. More specifically, the system identifies a memory access in the object code, where the memory access is associated with a memory location. The system then rewrites an instruction associated with this memory access to access the available register instead of the memory location. To preserve program semantics, the system subsequently moderates accesses to the memory location to ensure that no threads access a stale value in the enregistered memory location.
摘要翻译： 本发明的一个实施例提供了一种通过注册存储器位置来改进程序性能的系统。 在操作期间，系统接收为给定硬件实现而生成的程序对象代码，因此被优化为使用在该硬件实现中可用的指定数量的寄存器。 接下来，系统将该目标代码转换为在第二硬件实现上执行，该第二硬件实现包括比第一硬件实现更多的寄存器。 系统利用这些附加寄存器来提高第二个硬件实现的转换目标代码的性能。 更具体地，系统识别目标代码中的存储器访问，其中存储器访问与存储器位置相关联。 然后，系统重写与该存储器访问相关联的指令以访问可用寄存器而不是存储器位置。 为了保存程序语义，系统随后缓和对存储器位置的访问，以确保没有线程访问注册内存位置中的陈旧值。
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公开(公告)号：US08307353B2
公开(公告)日：2012-11-06
申请号：US12190498
申请日：2008-08-12
IPC分类号： G06F9/45
CPC分类号： G06F8/4443
摘要： A system and method are provided for inlining across protection domain boundaries with a system virtual machine. A protection domain comprises a unique combination of a privilege level and a memory address space. The system virtual machine interprets or dynamically compiles not only application code executing under guest operating systems, but also the guest operating systems. For a program call that crosses a protection domain boundary, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the applicable protection domains. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions reveal the protection domain in which they are to operate, and instructions corresponding to different domains may be interleaved.
摘要翻译： 提供了一种系统和方法，用于通过系统虚拟机跨越保护域边界进行内联。 保护域包括权限级别和存储器地址空间的唯一组合。 系统虚拟机不仅可以解释或动态编译在客户机操作系统下执行的应用程序代码，还可以对客户机操作系统进行动态编译。 对于跨越保护域边界的程序调用，虚拟机组合跨越边界的中间表示（IR）图。 通过识别适用的保护域的信息增强与呼叫两侧的代码相对应的区域节点。 IR被优化并用于在虚拟机的本机ISA（指令集架构）中生成指令。 单独的指令显示它们将要运行的保护域，并且可能交错对应于不同域的指令。
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公开(公告)号：US20100042980A1
公开(公告)日：2010-02-18
申请号：US12190498
申请日：2008-08-12
IPC分类号： G06F9/45
CPC分类号： G06F8/4443
摘要： A system and method are provided for inlining across protection domain boundaries with a system virtual machine. A protection domain comprises a unique combination of a privilege level and a memory address space. The system virtual machine interprets or dynamically compiles not only application code executing under guest operating systems, but also the guest operating systems. For a program call that crosses a protection domain boundary, the virtual machine assembles an intermediate representation (IR) graph that spans the boundary. Region nodes corresponding to code on both sides of the call are enhanced with information identifying the applicable protection domains. The IR is optimized and used to generate instructions in a native ISA (Instruction Set Architecture) of the virtual machine. Individual instructions reveal the protection domain in which they are to operate, and instructions corresponding to different domains may be interleaved.
摘要翻译： 提供了一种系统和方法，用于通过系统虚拟机跨越保护域边界进行内联。 保护域包括权限级别和存储器地址空间的唯一组合。 系统虚拟机不仅可以解释或动态编译在客户机操作系统下执行的应用程序代码，还可以对客户机操作系统进行动态编译。 对于跨越保护域边界的程序调用，虚拟机组合跨越边界的中间表示（IR）图。 通过识别适用的保护域的信息增强与呼叫两侧的代码相对应的区域节点。 IR被优化并用于在虚拟机的本机ISA（指令集架构）中生成指令。 单独的指令显示它们将要运行的保护域，并且可能交错对应于不同域的指令。
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7.发明授权公开(公告)号：US08799879B2
公开(公告)日：2014-08-05
申请号：US12495367
申请日：2009-06-30
IPC分类号： G06F9/45
CPC分类号： G06F9/45558 , G06F9/45516 , G06F9/45554 , G06F2009/45583
摘要： One embodiment provides a system that protects translated guest program code in a virtual machine that supports self-modifying program code. While executing a guest program in the virtual machine, the system uses a guest shadow page table associated with the guest program and the virtual machine to map a virtual memory page for the guest program to a physical memory page on the host computing device. The system then uses a dynamic compiler to translate guest program code in the virtual memory page into translated guest program code (e.g., native program instructions for the computing device). During compilation, the dynamic compiler stores in a compiler shadow page table and the guest shadow page table information that tracks whether the guest program code in the virtual memory page has been translated. The compiler subsequently uses the information stored in the guest shadow page table to detect attempts to modify the contents of the virtual memory page. Upon detecting such an attempt, the system invalidates the translated guest program code associated with the virtual memory page.
摘要翻译： 一个实施例提供一种保护支持自修改程序代码的虚拟机中的翻译的客户机程序代码的系统。 当在虚拟机中执行访客程序时，系统使用与访客程序和虚拟机相关联的来宾影子页面表将客机程序的虚拟存储器页面映射到主计算设备上的物理存储器页面。 然后，系统使用动态编译器将虚拟存储器页面中的客户程序代码翻译成客户程序代码（例如，用于计算设备的本地程序指令）。 在编译期间，动态编译器存储在编译器影子页表中，并且客户影子页表信息跟踪虚拟内存页中的访客程序代码是否已被翻译。 编译器随后使用存储在客人影子页表中的信息来检测修改虚拟内存页面内容的尝试。 在检测到这样的尝试时，系统使与虚拟存储器页面相关联的经翻译的访客程序代码无效。
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公开(公告)号：US20130073883A1
公开(公告)日：2013-03-21
申请号：US13303871
申请日：2011-11-23
CPC分类号： G06F1/32 , G06F1/3212 , Y02D10/174
摘要： In the various aspects, virtualization techniques may be used to reduce the amount of power consumed by execution of applications by power-optimizing the code prior to execution. A dynamic binary translator operating at the machine layer may use a power consumption model to identify code segments that can benefit from optimization and to perform an instruction-sequence to instruction-sequence translation of object code to generate power-optimized object code. Execution hardware may be instrumented with additional circuitry to measure the power consumption characteristics of executing code. The power consumption models may be updated and object code may be regenerated based on the measured the power consumption characteristics of previously executed code. In an aspect, power optimization may be accomplished when the computing device is connected to a battery charger.
摘要翻译： 在各个方面，虚拟化技术可以用于通过在执行之前对代码进行优化来减少执行应用所消耗的功率量。 在机器层上操作的动态二进制翻译器可以使用功耗模型来识别可以从优化中受益的代码段，并且执行指令序列到目标代码的指令序列转换以产生功率优化的目标代码。 执行硬件可以附加附加电路来测量执行代码的功耗特性。 可以基于测量的先前执行的代码的功耗特性来更新功耗模型并且可以重新生成目标代码。 在一个方面，当计算设备连接到电池充电器时，可以实现功率优化。
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公开(公告)号：US08397219B2
公开(公告)日：2013-03-12
申请号：US12415905
申请日：2009-03-31
CPC分类号： G06F12/1027 , G06F12/084
摘要： Described is a system that tracks enregistered memory locations. The system receives program object code that enregisters a memory location (e.g., a set of data at a given memory address) and executes the program code using a thread. Enregistering memory locations involves using additional registers to cache frequently used memory locations while the object code is executing, these additional registers being available on an architecture on which the program executes, but generally not available on an architecture for which the object code was generated. After enregistering the memory location, the system uses a table that identifies enregistered memory locations to track the associated memory address and a thread identifier for the thread. The system checks this table during memory accesses to ensure that other threads attempting to access an enregistered memory location receive a current value for the enregistered memory location.
摘要翻译： 描述了跟踪注册的内存位置的系统。 系统接收程序对象代码，该程序对象代码注册存储器位置（例如，给定存储器地址处的一组数据），并使用线程执行程序代码。 注册存储器位置涉及在目标代码正在执行时使用附加寄存器来缓存频繁使用的存储器位置，这些附加寄存器在程序执行的架构上可用，但通常不在生成对象代码的架构上可用。 在注册内存位置之后，系统使用一个表来识别注册的内存位置来跟踪关联的内存地址和线程的线程标识符。 在内存访问期间，系统会检查此表，以确保尝试访问注册内存位置的其他线程接收注册内存位置的当前值。
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10.发明授权公开(公告)号：US08078854B2
公开(公告)日：2011-12-13
申请号：US12334183
申请日：2008-12-12
CPC分类号： G06F9/30123 , G06F9/3004 , G06F9/30087 , G06F9/384 , G06F9/3842 , G06F9/3857 , G06F9/3863
摘要： One embodiment of the present invention provides a system that facilitates precise exception semantics. The system includes a processor that uses register rename maps to support out-of-order execution, where the register rename maps track mappings between native architectural registers and physical registers for a program executing on the processor. These register rename maps include: 1) a working rename map that maps architectural registers associated with a decoded instruction to corresponding physical registers; 2) a retire rename map that tracks and preserves a set of physical registers that are associated with retired instructions; and 3) a checkpoint rename map that stores a mapping between a set of architectural registers and a set of physical registers for a preceding checkpoint in the program. When the program signals an exception, the processor uses the checkpoint rename map to roll back program execution to the preceding checkpoint.
摘要翻译： 本发明的一个实施例提供了一种有助于精确异常语义的系统。 该系统包括一个使用寄存器重命名映射来支持无序执行的处理器，其中寄存器重命名映射本机结构寄存器和物理寄存器之间的跟踪映射，以便在处理器上执行的程序。 这些寄存器重命名映射包括：1）将与解码指令相关联的架构寄存器映射到对应的物理寄存器的工作重命名映射; 2）一个退休重命名映射，用于跟踪和保留与退休指令相关联的一组物理寄存器; 以及3）检查点重命名映射，其存储在一组结构寄存器和用于程序中前一检查点的一组物理寄存器之间的映射。 当程序发出异常时，处理器使用检查点重命名映射将程序执行回滚到上一个检查点。
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