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    Sequence display controlling method and controller
    4.
    发明授权
    Sequence display controlling method and controller 失效
    序列显示控制方法和控制器

    公开(公告)号：US4316260A

    公开(公告)日：1982-02-16

    申请号：US75221

    申请日：1979-09-13

    申请人： Keiji Hideshima ,  Haruo Koyanagi ,  Hiroharu Suda ,  Hirokazu Sawano ,  Masaoki Takaki ,  Kunio Yamanaka ,  Isao Yasuda ,  Kazuyoshi Asada

    发明人： Keiji Hideshima ,  Haruo Koyanagi ,  Hiroharu Suda ,  Hirokazu Sawano ,  Masaoki Takaki ,  Kunio Yamanaka ,  Isao Yasuda ,  Kazuyoshi Asada

    IPC分类号： G06F7/00 ,  G05B15/02 ,  G05B19/048 ,  G05B19/05 ,  G06F3/153 ,  G06F9/06

    CPC分类号： G05B19/056 ,  G05B2219/13052 ,  G05B2219/13128 ,  G05B2219/15055 ,  G05B2219/15107

    摘要： A programmable sequence controller is provided with a display signal processor for preparing and correcting a sequence program in combination with a CRT (or cathode ray tube) display device. The signal processor simply effects signal processing of branch points and composition points in case where a so-called "ladder diagram" constituting the sequence diagram with relay symbols is prepared and displayed. Branch information is stored in an FIFO (or first in first out) register. The branch information is sequentially received and stored, and the information thus stored is read out in the order of storage, thus preparing the ladder diagram. There are provided a register for instructing the FI operation and a register for instructing the FO operation. The sequence display controller is applicable to the cases where a new ladder diagram is to be prepared, the diagram once prepared is corrected, and the operation is checked.

    摘要翻译： 可编程顺序控制器具有显示信号处理器，用于与CRT（或阴极射线管）显示装置结合来准备和校正顺序程序。 在准备并显示构成具有中继符号的序列图的所谓“梯形图”的情况下，信号处理器仅仅对分支点和合成点进行信号处理。 分支信息存储在FIFO（或先进先出）寄存器中。 分支信息被顺序地接收和存储，并且按照存储的顺序读出这样存储的信息，从而准备梯形图。 提供了用于指示FI操作的寄存器和用于指示FO操作的寄存器。 序列显示控制器适用于要准备新梯形图的情况，一旦准备好的图形被校正，并且检查操作。

    Sequence control system
    5.
    发明授权
    Sequence control system 失效
    顺序控制系统

    公开(公告)号：US4298958A

    公开(公告)日：1981-11-03

    申请号：US73370

    申请日：1979-09-07

    申请人： Masaoki Takaki ,  Hirokazu Sawano ,  Kunio Yamanaka ,  Kazuyoshi Asada ,  Keiji Hideshima ,  Haruo Koyanagi

    发明人： Masaoki Takaki ,  Hirokazu Sawano ,  Kunio Yamanaka ,  Kazuyoshi Asada ,  Keiji Hideshima ,  Haruo Koyanagi

    IPC分类号： G05B19/05 ,  G05B11/00 ,  G06F9/06 ,  G06F11/00

    CPC分类号： G05B19/056 ,  G05B2219/1127 ,  G05B2219/1159 ,  G05B2219/13016 ,  G05B2219/13052 ,  G05B2219/13128 ,  G05B2219/13171 ,  G05B2219/13186 ,  G05B2219/14112 ,  G05B2219/15018 ,  G05B2219/15107 ,  G05B2219/33182

    摘要： A sequence control system suitable for checking the operation of an information processor includes a process I/O unit for receiving input data from process inputs and providing output data to process outputs; a sequence processing unit for calculating data at the process outputs by performing sequence operations according to the sequence programs stored in a sequence program memory on the basis of the data at the process inputs; a buffer memory provided between the process I/O unit and the sequence processing unit for storing both the process input data from the process I/O unit and the output data from the sequence processing unit; a control arrangement for setting the input data to the buffer memory and for allowing access to a selected sequence program according to manually set input information; a display for displaying the selected sequence program accessed through the control arrangement; and a switch for interrupting the transfer of I/O data between the process I/O unit and the buffer memory. The sequence processing unit determines the output data on the basis of the input data stored in the buffer memory and applies the output data to the buffer memory. The control arrangement, in response to the manually set input information, causes the associated sequence program to be read from the sequence program memory and then the data of the inputs and outputs associated with the sequence program to be read from the buffer memory thereby to indicate them on the display.

    摘要翻译： 适用于检查信息处理器的操作的顺序控制系统包括用于从过程输入接收输入数据并提供输出数据以处理输出的过程I / O单元; 序列处理单元，用于根据处理输入中的数据，通过根据存储在序列程序存储器中的顺序程序执行顺序操作来计算处理输出中的数据; 设置在处理I / O单元和序列处理单元之间的缓冲存储器，用于存储来自处理I / O单元的过程输入数据和来自序列处理单元的输出数据; 用于将输入数据设置到缓冲存储器并且允许根据手动设置的输入信息访问所选择的顺序程序的控制装置; 用于显示通过所述控制装置访问的所选序列程序的显示器; 以及用于中断I / O单元和缓冲存储器之间的I / O数据传输的开关。 序列处理单元基于存储在缓冲存储器中的输入数据来确定输出数据，并将输出数据应用于缓冲存储器。 控制装置响应于手动设置的输入信息，使得从序列程序存储器中读取相关联的顺控程序，然后使与从序列程序相关联的输入和输出的数据从缓冲存储器读取，从而指示 他们在展示。

    Method and system for controlling input/output in process control
    6.
    发明授权
    Method and system for controlling input/output in process control 失效
    控制过程控制输入/输出的方法和系统

    公开(公告)号：US4339794A

    公开(公告)日：1982-07-13

    申请号：US75152

    申请日：1979-09-12

    申请人： Keiji Hideshima ,  Haruo Koyanagi ,  Shuichi Senda ,  Kazuyoshi Asada ,  Norio Murayama ,  Yoshiyuki Nihashi ,  Masaoki Takaki

    发明人： Keiji Hideshima ,  Haruo Koyanagi ,  Shuichi Senda ,  Kazuyoshi Asada ,  Norio Murayama ,  Yoshiyuki Nihashi ,  Masaoki Takaki

    IPC分类号： G05B15/02 ,  G05B19/048 ,  G05B19/05 ,  G06F13/12 ,  G06F3/00 ,  G05B11/01

    CPC分类号： G05B19/054 ,  G05B2219/1159 ,  G05B2219/15048

    摘要： Novel method and system for controlling input/output in a process control wherein state signals of object processes to be controlled are applied to a CPU via a process input/output unit and operated in the CPU in accordance with a logic programmed and stored in advance, and results of the operation are delivered out to the object processes to control the same. A buffer memory is interposed between the CPU and the process input/output unit. While reception and delivery of data are performed between the CPU or processor unit and the buffer memory, fetching of the state signals of the object processes or delivery of the process controlling signals is performed between the buffer memory and the object processes, thereby attaining a high rate processing as viewed from the overall processing of the system.

    摘要翻译： 用于控制过程控制中的输入/输出的新方法和系统，其中要控制的对象处理的状态信号经由过程输入/输出单元被应用于CPU，并且根据预先编程和存储的逻辑在CPU中操作， 并将操作结果传递给对象进程以进行控制。 在CPU和过程输入/输出单元之间插入缓冲存储器。 虽然在CPU或处理器单元与缓冲存储器之间执行数据的接收和传送，但是在缓冲存储器和对象处理之间执行对象处理的状态信号的提取或处理控制信号的传递，从而达到高 从系统的整体处理来看，速率处理。

    Data processor system capable of providing both a computer mode and a sequencer mode of operation
    7.
    发明授权
    Data processor system capable of providing both a computer mode and a sequencer mode of operation 失效
    能够提供计算机模式和定序器操作模式的数据处理器系统

    公开(公告)号：US4344129A

    公开(公告)日：1982-08-10

    申请号：US67119

    申请日：1979-08-16

    申请人： Kazuyoshi Asada ,  Hajime Yasuda ,  Kunihiko Ohnuma

    发明人： Kazuyoshi Asada ,  Hajime Yasuda ,  Kunihiko Ohnuma

    IPC分类号： G05B15/02 ,  G05B19/05 ,  G06F9/30 ,  G06F15/00 ,  G06F15/46

    CPC分类号： G05B19/052 ,  G05B2219/1161 ,  G05B2219/15127

    摘要： A data processor system is capable of operating in a first mode comprising a computer mode so as to carry out data processing functions and is also capable of operating in a second mode comprising a sequencer mode so as to carry out high speed sequence operations on the basis of programmed sequences. A high speed change between the computer and sequencer modes can freely be effected by executing mode change instructions so that the data processor system performs the duplex functions of a computer and a sequencer.

    摘要翻译： 数据处理器系统能够以包括计算机模式的第一模式操作，以便执行数据处理功能，并且还能够以包括定序器模式的第二模式操作，以便在此基础上执行高速序列操作 的编程序列。 通过执行模式改变指令可以自由地实现计算机和定序器模式之间的高速变化，使得数据处理器系统执行计算机和定序器的双工功能。

    Information processing system using neural network learning function
    9.
    发明授权
    Information processing system using neural network learning function 失效
    信息处理系统采用神经网络学习功能

    公开(公告)号：US5295197A

    公开(公告)日：1994-03-15

    申请号：US774887

    申请日：1991-10-11

    申请人： Hiroshi Takenaga ,  Yoshiyuki Okuyama ,  Masao Takatoo ,  Kazuyoshi Asada ,  Norio Tanaka ,  Tadaaki Kitamura ,  Kuniyuki Kikuchi

    发明人： Hiroshi Takenaga ,  Yoshiyuki Okuyama ,  Masao Takatoo ,  Kazuyoshi Asada ,  Norio Tanaka ,  Tadaaki Kitamura ,  Kuniyuki Kikuchi

    IPC分类号： G06K9/66 ,  G06K9/00

    CPC分类号： G06K9/66

    摘要： An information processing apparatus using a neural network learning function has, in one embodiment, a computer system and a pattern recognition apparatus associated with each other via a communication cable. The computer system includes a learning section having a first neural network and serves to adjust the weights of connection therein as a result of learning with a learning data signal supplied thereto from the pattern recognition apparatus via the communication cable. The pattern recognition apparatus includes an associative output section having a second neural network and receives data on the adjusted weights from the learning section via the communication cable to reconstruct the second neural network with the data on the adjusted weights. The pattern recognition apparatus with the associative output section having the reconstructed second neural network performs pattern recognition independently of the computer system with the communication cable being brought into an electrical isolation mode.

    摘要翻译： 在一个实施例中，使用神经网络学习功能的信息处理设备通过通信电缆彼此相关联的计算机系统和模式识别设备。 计算机系统包括具有第一神经网络的学习部分，并且用于通过经由通信电缆从模式识别装置向其提供的学习数据信号的学习来调整其中的连接的权重。 模式识别装置包括具有第二神经网络的关联输出部分，并且经由通信电缆接收来自学习部分的经调整的权重的数据，以利用调整后的权重的数据重构第二神经网络。 具有重建的第二神经网络的关联输出部分的模式识别装置在通信电缆进入电隔离模式的情况下，独立于计算机系统执行模式识别。

    Information processing system using neural network learning function
    10.
    发明授权
    Information processing system using neural network learning function 失效
    信息处理系统采用神经网络学习功能

    公开(公告)号：US5086479A

    公开(公告)日：1992-02-04

    申请号：US544870

    申请日：1990-06-28

    申请人： Hiroshi Takenaga ,  Yoshiyuki Okuyama ,  Masao Takatoo ,  Kazuyoshi Asada ,  Norio Tanaka ,  Tadaaki Kitamura ,  Kuniyuki Kikuchi

    发明人： Hiroshi Takenaga ,  Yoshiyuki Okuyama ,  Masao Takatoo ,  Kazuyoshi Asada ,  Norio Tanaka ,  Tadaaki Kitamura ,  Kuniyuki Kikuchi

    IPC分类号： G06K9/66

    CPC分类号： G06K9/66

    摘要： An information processing apparatus using a neural network learning function has, in one embodiment, a computer system and a pattern recognition apparatus associated with each other via a communication cable. The computer system includes a learning section having a first neural network and serves to adjust the weights of connection therein as a result of learning with a learning data signal supplied thereto from the pattern recognition apparatus via the communication cable. The pattern recognition apparatus includes an associative output section having a second neural network and receives data on the adjusted weights from the learning section via the communication cable to reconstruct the second neural network with the data on the adjusted weights. The pattern recognition apparatus with the associative output section having the reconstructed second neural network performs pattern recognition independently of the computer system with the communication cable being brought into an electrical isolation mode.

    摘要翻译： 在一个实施例中，使用神经网络学习功能的信息处理设备通过通信电缆彼此相关联的计算机系统和模式识别设备。 计算机系统包括具有第一神经网络的学习部分，并且用于通过经由通信电缆从模式识别装置向其提供的学习数据信号的学习来调整其中的连接的权重。 模式识别装置包括具有第二神经网络的关联输出部分，并且经由通信电缆接收来自学习部分的经调整的权重的数据，以利用调整后的权重的数据重构第二神经网络。 具有重建的第二神经网络的关联输出部分的模式识别装置在通信电缆进入电隔离模式的情况下，独立于计算机系统执行模式识别。