摘要:
Techniques are provided herein for digital data-aided frequency offset estimation offering better performance and increased accuracy over existing solutions. These new techniques also allow a trade-off between complexity and accuracy to be performed. The embodiments of the techniques for frequency offset estimation can be used for correction in both feedback and feed-forward control.
摘要:
The current invention provides simplifications to the user equipment (UE) radio front end module for the cellular handset or dongle through modification of the existing 3GPP specifications for LTE and WCDMA/HSPA+ in order to support half duplex (HD) operation. The option to support HD operation is provided without mandating upgrades to all existing base stations that have already been deployed. The instant invention further prevents HD UEs from attaching to any base stations which do not support HD operations. The instant invention further provides inter-frequency cell search periods for enabling HD UEs to communicate with any base stations/cells supporting the HD operations. The instant invention further enables the HSPA+ system to support the HD-FDD mode.
摘要:
Techniques are provided that can extend the efficiency of a switching regulator further into the low current region by making use of the available knowledge on predictable load variations and voltage ripple tolerance across different states, providing improved efficiency and reducing total current consumption. The load current requirement in low power states is provided using switch mode rather than linear regulation, the switch mode operation being controlled by a mode dependent control circuit so as to minimize the energy cost of the switching operation in each mode and thus obtain improved efficiency from the power source.
摘要:
Techniques are provided herein for digital data-aided frequency offset estimation offering better performance and increased accuracy over existing solutions. These new techniques also allow a trade-off between complexity and accuracy to be performed. The embodiments of the techniques for frequency offset estimation can be used for correction in both feedback and feed-forward control.
摘要:
Techniques are provided aimed at improving the flexibility and reducing the area and power consumption of digital baseband integrated circuits by using stream data processor based modem architecture. Semiconductor companies offering baseband ICs for handsets, face the challenges of improving die size efficiency, power efficiency, performance, time to market, and coping with evolving standards. Software defined radio based implementations offer a fast time to market. Dedicated hardware designs give the best die size and power efficiency. To combine the advantages of dedicated hardware with the advantages of conventional software defined radio solutions the stream data processor is partitioned into a stream processor unit, which implements processing functions in dedicated hardware and is hence die size and power efficient, and a flexible stream control unit which may be software defined to minimize the time to market of the product.
摘要:
Techniques are provided aimed at improving the flexibility and reducing the area and power consumption of digital baseband integrated circuits by using stream data processor based modem architecture. Semiconductor companies offering baseband ICs for handsets, face the challenges of improving die size efficiency, power efficiency, performance, time to market, and coping with evolving standards. Software defined radio based implementations offer a fast time to market. Dedicated hardware designs give the best die size and power efficiency. To combine the advantages of dedicated hardware with the advantages of conventional software defined radio solutions the stream data processor is partitioned into a stream processor unit, which implements processing functions in dedicated hardware and is hence die size and power efficient, and a flexible stream control unit which may be software defined to minimise the time to market of the product.
摘要:
Techniques are provided that can extend the efficiency of a switching regulator further into the low current region by making use of the available knowledge on predictable load variations and voltage ripple tolerance across different states, providing improved efficiency and reducing total current consumption. The load current requirement in low power states is provided using switch mode rather than linear regulation, the switch mode operation being controlled by a mode dependent control circuit so as to minimize the energy cost of the switching operation in each mode and thus obtain improved efficiency from the power source.
摘要:
A regional dimming driving method for a display device is provided. The display device includes multiple backlight sources respectively corresponding to multiple display regions of the display device. The regional dimming driving method includes acquiring a brightness value of each display region according to input image data, processing and adjusting the brightness value of each display region to acquire an adjusted brightness value of regional dimming of each display region, and respectively driving the backlight sources according to the adjusted brightness values of regional dimming of the corresponding display regions. By processing and adjusting the brightness values of the display regions, display effects can be effectively provided.
摘要:
An electronic device includes a clock generating circuit, a receiving circuit and a training circuit. The clock generating circuit generates a sampling clock signal, a phase-early sampling clock signal and a phase-late sampling clock signal. The receiving circuit samples received data according to the sampling clock signal, the phase-early sampling clock signal and the phase-late sampling clock signal to generate a sample result. The training circuit controls the clock generating circuit to generate the sampling clock signal and the corresponding phase-early sampling clock signal and phase-late sampling clock signal that have different phases in a plurality of different time intervals, respectively, to cause the receiving circuit to generate a plurality of sample results. The training circuit further determines a sampling phase of the sampling clock signal according to the sample results.
摘要:
A display apparatus includes a video processor, a graphics processor, a combining circuit, a retrieving circuit and a graphics controller. The video processor process target video information and generates a corresponding video signal. The graphics processor processes graphic data and generates a corresponding graphic signal. When the target video data changes from first video data to second video data, the retrieving circuit retrieves a static picture associated with the first video data and accordingly generates a retrieval result. The graphics controller utilizes the retrieval result as graphic data provided to the graphics processor. The combining circuit combines the graphic signal on the video signal to generate an output video signal.