公开(公告)号：US20060014370A1

公开(公告)日：2006-01-19

申请号：US10878157

申请日：2004-06-28

Applicant: Musawir Chowdhury ,  Charles Cohn

Inventor： Musawir Chowdhury ,  Charles Cohn

IPC: H01L21/44

CPC classification number: H01L23/49805 ,  H01L21/4846 ,  H01L23/36 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H05K3/242 ,  H05K3/429 ,  H05K2201/0949 ,  H05K2203/1581 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: An integrated circuit package is processed by electroplating the integrated circuit package. The electroplating is performed without forming plating traces on a conductive surface of a pad side of the integrated circuit package. Pad areas of the integrated circuit package are thus plated with one or more materials. An integrated circuit may be electrically coupled to pad areas on the integrated circuit package. The integrated circuit package can be electroplated by using the one or more current sources coupled to a back plane of the integrated circuit package. The back plane is patterned, wherein the patterning of the back plane occurs after the step of electroplating.

Abstract translation: 通过电镀集成电路封装来处理集成电路封装。 执行电镀而不在集成电路封装的焊盘侧的导电表面上形成电镀迹线。 因此，集成电路封装的焊盘区域被镀上一种或多种材料。 集成电路可以电耦合到集成电路封装上的焊盘区域。 集成电路封装可以通过使用耦合到集成电路封装的背板的一个或多个电流源进行电镀。 背面被图案化，其中背面的图案发生在电镀步骤之后。