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    Decision feedback equalization with composite trellis slicer
    3.
    发明授权
    Decision feedback equalization with composite trellis slicer 失效
    决策反馈均衡与复合网格切片机

    公开(公告)号：US07680180B2

    公开(公告)日：2010-03-16

    申请号：US11425602

    申请日：2006-06-21

    申请人： Yuwei Zhang ,  Kevin Hwang ,  Jun Lu ,  Shue-Lee Chang

    发明人： Yuwei Zhang ,  Kevin Hwang ,  Jun Lu ,  Shue-Lee Chang

    IPC分类号： H03H7/30 ,  H03H7/40 ,  H03K5/159

    CPC分类号： H04L25/03057 ,  H04L25/03267 ,  H04L2025/0349

    摘要： A decision feedback equalizer is configured to equalize an input signal to generate a recovered output signal. Linear feed-forward filter circuitry is configured to provide a linearly filtered output signal based on the input signal. Composite trellis decoder circuitry configured to process a combined signal that is based on a combination of at least the linearly feed-forward filtered output signal and on output of linear or non-linear feedback filter circuitry, in accordance with state metrics generated by processing a composite trellis diagram relative to the combined signal, to provide a trellis-decoded output signal as input to the linear or non-linear feedback filter circuitry. The composite trellis decoder circuitry is further configured to provide a particular phase output of the combined signal, based on the state metrics, as the decoded output signal.

    摘要翻译： 判定反馈均衡器被配置为均衡输入信号以产生恢复的输出信号。 线性前馈滤波器电路被配置为基于输入信号提供线性滤波的输出信号。 复合网格解码器电路，被配置为处理基于至少线性前馈滤波的输出信号和线性或非线性反馈滤波器电路的输出的组合的组合信号，根据通过处理复合 网格图相对于组合信号，以提供格状解码的输出信号作为线性或非线性反馈滤波器电路的输入。 复合网格解码器电路还被配置为基于状态度量提供组合信号的特定相位输出作为解码输出信号。

    Full search MIMO detector for recovering single or multiple data stream in a multiple antenna receiver
    4.
    发明授权
    Full search MIMO detector for recovering single or multiple data stream in a multiple antenna receiver 有权
    全搜索MIMO检测器，用于在多天线接收机中恢复单个或多个数据流

    公开(公告)号：US09059828B1

    公开(公告)日：2015-06-16

    申请号：US13897447

    申请日：2013-05-20

    申请人： Jose Marcelo Lima Duarte ,  Shue Lee Chang ,  Wee Peng Goh

    发明人： Jose Marcelo Lima Duarte ,  Shue Lee Chang ,  Wee Peng Goh

    IPC分类号： H04L27/06 ,  H04L1/00

    CPC分类号： H04L1/0054 ,  H04L1/06 ,  H04L25/03242 ,  H04L25/03318 ,  H04L25/03891 ,  H04L2025/03598

    摘要： This invention discloses an optimum form maximum likelihood MIMO detector (SFS ML Detector) that computes the LLR of the most likely received bit sequence from the received signal y, which consist of multiple signal stream from a MIMO channel H and an estimate of H. Through 5 simple steps of QR factorization, computation of partial Euclidean distance, sorting of the partial Euclidean distance, selection of surviving hypothesis by a set of algorithmic rule and computation of the full Euclidean distance of the survivors, and computation of the maximum likelihood from the surviving full Euclidean distance, the LLR of the received bit sequence can be obtained with a significantly lower number of computation and comparison than that is implied in the theoretical form of the maximum likelihood (ML) detector. There is no loss in performance of the SFS ML detector from the theoretical ML detector.

    摘要翻译： 本发明公开了一种最佳形式最大似然MIMO检测器（SFS ML检测器），其从接收信号y计算最可能接收的比特序列的LLR，其由来自MIMO信道H的多个信号流和H的估计组成。通过 QR分解的5个简单步骤，部分欧几里德距离的计算，部分欧几里德距离的排序，通过一组算法规则选择存活假设和计算幸存者的完整欧几里德距离，以及计算幸存者的最大似然 完全欧几里德距离，可以以比最大似然（ML）检测器的理论形式暗示的计算和比较数明显减少得到接收到的位序列的LLR。 来自理论ML检测器的SFS ML检测器的性能没有损失。

    TRAINING OF THE NON-UPDATED DECISION FEEDBACK EQUALIZER FOR A 8-VSB RECEIVER
    7.
    发明申请
    TRAINING OF THE NON-UPDATED DECISION FEEDBACK EQUALIZER FOR A 8-VSB RECEIVER 审中-公开
    针对8-VSB接收机的非更新决策反馈均衡器的培训

    公开(公告)号：US20100080275A1

    公开(公告)日：2010-04-01

    申请号：US12239794

    申请日：2008-09-28

    申请人： Lin Yang ,  Jun Lu ,  Shue-Lee Chang ,  Jing Li ,  Syang-Myau Hwang

    发明人： Lin Yang ,  Jun Lu ,  Shue-Lee Chang ,  Jing Li ,  Syang-Myau Hwang

    IPC分类号： H03H7/30 ,  H03H7/40

    CPC分类号： H04L25/03146 ,  H04L25/0202 ,  H04L27/02 ,  H04L2025/03477 ,  H04L2025/0349

    摘要： A method for training of a non-updated decision feedback equalizer is provided. The method comprising the steps of: providing a sequence of frames adapted to be received by a receiver; provide a sequence of synchronization frames interposed between a predetermined number of frames; and using at least part of the sequence of synchronization frames to train a decision feedback equalizer (DFE), thereby speeding up system convergence or making system convergence possible.

    摘要翻译： 提供了一种用于训练未更新的判决反馈均衡器的方法。 该方法包括以下步骤：提供适于由接收机接收的帧序列; 提供插入在预定数量帧之间的同步帧序列; 并且使用同步帧序列的至少一部分来训练判决反馈均衡器（DFE），从而加速系统收敛或使系统收敛成为可能。

    DECISION FEEDBACK EQUALIZATION WITH COMPOSITE TRELLIS SLICER
    8.
    发明申请
    DECISION FEEDBACK EQUALIZATION WITH COMPOSITE TRELLIS SLICER 失效
    决策反馈与复合TRELLIS SLICER的均衡

    公开(公告)号：US20070140329A1

    公开(公告)日：2007-06-21

    申请号：US11425602

    申请日：2006-06-21

    申请人： Yuwei Zhang ,  Kevin Hwang ,  Jun Lu ,  Shue-Lee Chang

    发明人： Yuwei Zhang ,  Kevin Hwang ,  Jun Lu ,  Shue-Lee Chang

    IPC分类号： H03H7/30 ,  H04B1/10

    CPC分类号： H04L25/03057 ,  H04L25/03267 ,  H04L2025/0349

    摘要： A decision feedback equalizer is configured to equalize an input signal to generate a recovered output signal. Linear feed-forward filter circuitry is configured to provide a linearly filtered output signal based on the input signal. Composite trellis decoder circuitry configured to process a combined signal that is based on a combination of at least the linearly feed-forward filtered output signal and on output of linear or non-linear feedback filter circuitry, in accordance with state metrics generated by processing a composite trellis diagram relative to the combined signal, to provide a trellis-decoded output signal as input to the linear or non-linear feedback filter circuitry. The composite trellis decoder circuitry is further configured to provide a particular phase output of the combined signal, based on the state metrics, as the decoded output signal.

    摘要翻译： 判定反馈均衡器被配置为均衡输入信号以产生恢复的输出信号。 线性前馈滤波器电路被配置为基于输入信号提供线性滤波的输出信号。 复合网格解码器电路，被配置为处理基于至少线性前馈滤波的输出信号和线性或非线性反馈滤波器电路的输出的组合的组合信号，根据通过处理复合 网格图相对于组合信号，以提供格状解码的输出信号作为线性或非线性反馈滤波器电路的输入。 复合网格解码器电路还被配置为基于状态度量提供组合信号的特定相位输出作为解码输出信号。