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公开(公告)号：US5487067A
公开(公告)日：1996-01-23
申请号：US189783
申请日：1994-02-01
申请人： Takashi Matsushige
发明人： Takashi Matsushige
摘要： Data communications apparatus comprises a master device for processing digital audio data and a plurality of slave devices connectable in a ring network with the master device. Each slave device has a plurality of data channels associated therewith and is arranged for supply, in use, of audio data from the ring network to its associated data channels and/or to the ring network from its associated data channels. The master and slave devices are arranged for serial communication via the ring network in use of digital audio data formatted in frames, each frame comprising a plurality of data blocks which data blocks contain audio sample data corresponding to respective audio signals. The master and slave devices are further arranged for communication via the ring network in use of set-up data comprising set-up commands transmitted by the master device to the slave devices and set-up responses transmitted by the slave devices to the master device, whereby the master device determines the arrangement of slave devices around the ring network and the number of data channels associated with each slave device, and, in dependence upon the said arrangement and numbers of data channels, allocates to any slave device which is arranged for supply of audio data from the network to its associated data channels a sequence of data blocks within each frame of the digital audio data format in which sequence of data blocks audio data will be transmitted to that slave device for supply to its associated data channels.
摘要翻译： 数据通信装置包括用于处理数字音频数据的主设备和可与主设备在环网中连接的多个从设备。 每个从设备具有与其相关联的多个数据信道，并且被布置用于在使用中从其相关联的数据信道向环网提供音频数据到其相关联的数据信道和/或向环网提供音频数据。 主设备和从设备被布置用于通过使用格式化为帧的数字音频数据的环形网络进行串行通信，每个帧包括多个数据块，该数据块包含对应于各个音频信号的音频采样数据。 主设备和从设备还被布置用于通过使用包括由主设备发送到从设备的建立命令的设置数据和由从设备发送到主设备的建立响应的环路网络进行通信， 由此主设备确定环形网络周围的从设备的布置以及与每个从设备相关联的数据信道的数量，并且根据所述数据信道的配置和数量，分配给任何被配置为供应的从设备 音频数据从网络到其相关联的数据信道，数字音频数据格式的每个帧内的数据块序列，其中将数据块的音频数据块发送到该从设备以提供给其关联的数据信道。
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公开(公告)号：US4409682A
公开(公告)日：1983-10-11
申请号：US188273
申请日：1980-09-18
IPC分类号： G11B27/031 , G11B27/038 , H03G3/00 , G09B5/04 , G06F3/16 , G06F5/00
CPC分类号： G11B27/038 , G11B27/031 , H03G3/002
摘要： A digital editing system includes first and second memories in which audio data and weighting factor data are respectively stored. The audio data are sequentially retrieved from the first memory and multiplied by corresponding weighting factor data retrieved from the second memory. A coincidence detector detects when predetermined storage locations of the memories are addressed. The weighting factor data has a unity or zero value during the time prior to the occurrence of an output from the detector, whereupon it changes its value as a function of time until it reaches to zero or unity and remains at the final value thereafter. The direction of variation of the weighting factor data can be appropriately selected to modify the audio data into a so-called "fade out" of "fade-in" pattern at a desired point of the audio program. A pair of such editing systems is required for editing audio programs from different sources for storing such programs in a pair of first memories. Weighting factor data respectively stored in the second memories vary in opposite directions so that the audio data from the first memories are modified into "fade-out" and "fade-in" patterns which are combined in an adder to create a single, continuous audio program.
摘要翻译： 数字编辑系统包括其中分别存储音频数据和加权因子数据的第一和第二存储器。 从第一存储器顺序地检索音频数据，并乘以从第二存储器检索的对应的加权因子数据。 符合检测器检测存储器的预定存储位置何时被寻址。 加权因子数据在从检测器的输出发生之前的时间期间具有一个或者零的值，于是它随着时间的变化而改变其值，直到达到零或一致，然后保持在最终值。 可以适当地选择加权因子数据的变化方向，以将音频数据修改为在音频节目的期望点处的“淡入”模式的所谓“淡出”。 需要一对这样的编辑系统来编辑来自不同来源的音频节目，用于将这样的节目存储在一对第一存储器中。 分别存储在第二存储器中的权重因子数据沿相反的方向变化，使得来自第一存储器的音频数据被修改为“淡出”和“淡入”模式，其被组合在加法器中以创建单个连续的音频 程序。
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公开(公告)号：US4376959A
公开(公告)日：1983-03-15
申请号：US188274
申请日：1980-09-18
CPC分类号： G11B27/3027 , G11B27/002 , G11B27/024 , G11B27/10 , G11B2220/90
摘要： Prerecorded audio or video information signals including address data indicating the location of synchronized signals from a plurality of synchronized sources are supplied to a single separation circuit via a switching circuit. The separation circuit, selectively connected to one of the signal sources via the switching circuit, separates the address data from the audio or video information of the connected signal source. A register connected to the separation circuit receives the separated address data which constantly updates the register contents. At least one counter is reset to the contents of the register each time a newly selected signal source is connected to the separation circuit to load the address data of the previously connected signal source into that counter. At regular intervals one binary increment is added to the counter address data so that the counter count value corresponds to the address data of the previously connected signal source. The output of the register is a representation of the address of the signal source that is connected to the separation circuit at any instant of time.
摘要翻译： 包括表示来自多个同步源的同步信号的位置的地址数据的预先记录的音频或视频信息信号经由开关电路被提供给单个分离电路。 经由开关电路选择性地连接到信号源之一的分离电路将地址数据与连接的信号源的音频或视频信息分开。 连接到分离电路的寄存器接收不断更新寄存器内容的分离的地址数据。 每当新选择的信号源连接到分离电路时，至少一个计数器被复位到寄存器的内容，以将先前连接的信号源的地址数据加载到该计数器中。 定期地，将一个二进制增量加到计数器地址数据上，使得计数器计数值对应于先前连接的信号源的地址数据。 寄存器的输出是在任何时刻连接到分离电路的信号源的地址的表示。
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公开(公告)号：US5661478A
公开(公告)日：1997-08-26
申请号：US528040
申请日：1995-09-14
申请人： Takashi Matsushige
发明人： Takashi Matsushige
CPC分类号： G11B20/10527 , H04H60/04
摘要： Analogue to digital (A/D) and digital to analogue (D/A) converters perform the required conversion at a higher sampling rate (e.g. 64Fs) and a lower resolution (e.g. 1 to 4 bits) than the actual sampling rate (Fs) and resolution (e.g. 16 bits) of the required digital signal. The oversampled low resolution signal is generated by oversampling the input digital signal (for D/A conversion) or is decimated to generate the required output digital signal (for A/D conversion). The oversampling or decimation filters are switchable between two modes of operation, in which different signal delays are imposed by the filter. Thus a lower quality, but shorter delay, filter can be used in converters in the signal path for an artist's foldback signal. This can reduce the subjectively disturbing effects of long conversion delays in the foldback signal path.
摘要翻译： 模拟数字（A / D）和数模（D / A）转换器以比实际采样率（Fs）更高的采样率（例如64Fs）和较低分辨率（例如1至4位）执行所需的转换， 和所需数字信号的分辨率（例如16位）。 过采样低分辨率信号通过对输入数字信号进行过采样（用于D / A转换）产生，或者被抽取以产生所需的输出数字信号（用于A / D转换）。 过采样或抽取滤波器可在两种工作模式之间切换，其中滤波器施加不同的信号延迟。 因此，较低质量但较短延迟的滤波器可用于艺术家折返信号的信号路径中的转换器中。 这可以减少折返信号路径中的长转换延迟的主观干扰效应。
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公开(公告)号：US4321685A
公开(公告)日：1982-03-23
申请号：US095554
申请日：1979-11-19
申请人： Masao Kasuga , Masaki Satoh , Takashi Matsushige
发明人： Masao Kasuga , Masaki Satoh , Takashi Matsushige
CPC分类号： H03H17/0461
摘要： A circuit arrangement of a digital filter comprises an A/D converter supplied with an input analog signal and producing as output a pulse-modulated digital signal, a digital filter for subjecting the digital signal from the A/D converter to a digital operation processing of finite word length, a D/A converter supplied with the resulting output digital signal of the digital filter and converting the same into an analog signal thereby to generate an output analog signal, an input detector for detecting the state wherein there is substantially no input analog signal and responsively producing as output a detection signal, an integrator for integrating the output of the D/A converter, a switching circuit for operating in response to the output detection signal of the input detector to pass the resulting output signal of the integrator, a reference voltage source, and an adder for adding the signal thus passed by the switching circuit and a reference voltage from the reference voltage source and feeding back and imparting the sum signal thus obtained to the A/D converter.
摘要翻译： 数字滤波器的电路装置包括一个A / D转换器，它被提供有一个输入的模拟信号，并产生一个脉冲调制的数字信号作为输出;一个数字滤波器，用于对来自A / D转换器的数字信号进行数字运算处理 有限字长，D / A转换器，其提供数字滤波器的所得输出数字信号，并将其转换成模拟信号，从而产生输出模拟信号;输入检测器，用于检测基本上没有输入模拟信号的状态 信号并且响应地产生检测信号的输出，用于对D / A转换器的输出进行积分的积分器，用于响应于输入检测器的输出检测信号进行操作的开关电路，以通过积分器的所得输出信号， 参考电压源和用于将由开关电路通过的信号与来自参考电压源的参考电压相加的加法器 e并反馈并将如此获得的和信号传递给A / D转换器。
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