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公开(公告)号：US4376959A
公开(公告)日：1983-03-15
申请号：US188274
申请日：1980-09-18
CPC分类号： G11B27/3027 , G11B27/002 , G11B27/024 , G11B27/10 , G11B2220/90
摘要： Prerecorded audio or video information signals including address data indicating the location of synchronized signals from a plurality of synchronized sources are supplied to a single separation circuit via a switching circuit. The separation circuit, selectively connected to one of the signal sources via the switching circuit, separates the address data from the audio or video information of the connected signal source. A register connected to the separation circuit receives the separated address data which constantly updates the register contents. At least one counter is reset to the contents of the register each time a newly selected signal source is connected to the separation circuit to load the address data of the previously connected signal source into that counter. At regular intervals one binary increment is added to the counter address data so that the counter count value corresponds to the address data of the previously connected signal source. The output of the register is a representation of the address of the signal source that is connected to the separation circuit at any instant of time.
摘要翻译： 包括表示来自多个同步源的同步信号的位置的地址数据的预先记录的音频或视频信息信号经由开关电路被提供给单个分离电路。 经由开关电路选择性地连接到信号源之一的分离电路将地址数据与连接的信号源的音频或视频信息分开。 连接到分离电路的寄存器接收不断更新寄存器内容的分离的地址数据。 每当新选择的信号源连接到分离电路时，至少一个计数器被复位到寄存器的内容，以将先前连接的信号源的地址数据加载到该计数器中。 定期地，将一个二进制增量加到计数器地址数据上，使得计数器计数值对应于先前连接的信号源的地址数据。 寄存器的输出是在任何时刻连接到分离电路的信号源的地址的表示。
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公开(公告)号：US4409682A
公开(公告)日：1983-10-11
申请号：US188273
申请日：1980-09-18
IPC分类号： G11B27/031 , G11B27/038 , H03G3/00 , G09B5/04 , G06F3/16 , G06F5/00
CPC分类号： G11B27/038 , G11B27/031 , H03G3/002
摘要： A digital editing system includes first and second memories in which audio data and weighting factor data are respectively stored. The audio data are sequentially retrieved from the first memory and multiplied by corresponding weighting factor data retrieved from the second memory. A coincidence detector detects when predetermined storage locations of the memories are addressed. The weighting factor data has a unity or zero value during the time prior to the occurrence of an output from the detector, whereupon it changes its value as a function of time until it reaches to zero or unity and remains at the final value thereafter. The direction of variation of the weighting factor data can be appropriately selected to modify the audio data into a so-called "fade out" of "fade-in" pattern at a desired point of the audio program. A pair of such editing systems is required for editing audio programs from different sources for storing such programs in a pair of first memories. Weighting factor data respectively stored in the second memories vary in opposite directions so that the audio data from the first memories are modified into "fade-out" and "fade-in" patterns which are combined in an adder to create a single, continuous audio program.
摘要翻译： 数字编辑系统包括其中分别存储音频数据和加权因子数据的第一和第二存储器。 从第一存储器顺序地检索音频数据，并乘以从第二存储器检索的对应的加权因子数据。 符合检测器检测存储器的预定存储位置何时被寻址。 加权因子数据在从检测器的输出发生之前的时间期间具有一个或者零的值，于是它随着时间的变化而改变其值，直到达到零或一致，然后保持在最终值。 可以适当地选择加权因子数据的变化方向，以将音频数据修改为在音频节目的期望点处的“淡入”模式的所谓“淡出”。 需要一对这样的编辑系统来编辑来自不同来源的音频节目，用于将这样的节目存储在一对第一存储器中。 分别存储在第二存储器中的权重因子数据沿相反的方向变化，使得来自第一存储器的音频数据被修改为“淡出”和“淡入”模式，其被组合在加法器中以创建单个连续的音频 程序。
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公开(公告)号：US4355304A
公开(公告)日：1982-10-19
申请号：US217949
申请日：1980-12-18
申请人： Masao Kasuga , Norio Hiyama , Yoshiyuki Tsuchikane
发明人： Masao Kasuga , Norio Hiyama , Yoshiyuki Tsuchikane
CPC分类号： H04B14/048 , H03G7/007
摘要： A compressing system for digital modulated signals comprises an analog-to-digital converter for obtaining a digital modulated signal by digitally modulating an analog signal; a first variable gain circuit provided at the output side of the analog-to-digital converter; and a first gain control circuit for equivalently performing level-compression of the analog conversion level of the input digital modulated signal of the first gain control circuit within a predetermined level range by use of a first control signal and the first variable gain circuit. The first gain control circuit comprises an expected signal generating circuit having an analog conversion level z.sub.n which satisfies the equation ##EQU1## (N is an arbitrary natural number, and a.sub.O through a.sub.N are zero or an arbitrary number) where y.sub.n designates the analog conversion level of a digital modulated signal or the differential signal of the digital modulated signal at a time nT obtained from either the input side or output side of said first variable gain circuit (T indicates the sampling period of the digital modulated signal) and a.sub.i designates the coefficient used for the weighting, a variable reference level generator which generates a reference level, and a comparator which supplies the first control signal as output by comparing the reference level thus generated with the analog conversion level z.sub.n of the above expected signal. The expanding system comprises a second variable gain circuit supplied with the digital modulated signal obtained and transmitted from the first gain control circuit, which varies the analog conversion level of the input digital modulated signal according to a second control signal; a second gain control circuit for equivalently performing level-expansion of the analog conversion level of the input digital modulated signal of the second gain control circuit by the same quantity as the above level-compression within a predetermined level range by use of the second variable gain circuit and performing an opposite operation as that performed by the first gain control circuit with respect to the digital modulated signal obtained from either the input side or the output side of the second variable gain circuit, and a digital-to-analog converter for converting the output digital modulated signal of the second variable gain circuit into an analog signal.
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公开(公告)号：US4453255A
公开(公告)日：1984-06-05
申请号：US345459
申请日：1982-02-03
申请人： Yoshiyuki Tsuchikane , Masao Kasuga
发明人： Yoshiyuki Tsuchikane , Masao Kasuga
CPC分类号： G11B5/035 , H03G5/005 , H03G5/025 , H04L25/03146
摘要： A characteristic control system for a digital equalizer comprises a digital equalizer constructed from a digital filter, for directly giving a desired equalizing characteristic with respect to a digital pulse-modulated signal, and a control part for changing the equalizing characteristic of the digital equalizer from a first arbitrary characteristic to a second arbitrary characteristic so that one or a plurality of intermediate equalizing characteristic is obtained before reaching the desired second arbitrary characteristic.
摘要翻译： 用于数字均衡器的特征控制系统包括由数字滤波器构成的数字均衡器，用于直接给出相对于数字脉冲调制信号的所需均衡特性，以及用于从数字均衡器改变数字均衡器的均衡特性的控制部分 第二任意特性的第一任意特征，使得在达到期望的第二任意特性之前获得一个或多个中间均衡特性。
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公开(公告)号：US4105213A
公开(公告)日：1978-08-08
申请号：US729669
申请日：1976-10-05
CPC分类号： G11B3/44 , B23B27/148 , G11B3/00
摘要： A stylus for cutting a sound groove on a disc recording medium comprises a diamond body having a groove cutting part, for producing a chip cut from the disc recording medium. The stylus also includes a structure made of a material which does not readily generate static electricity when the chip is in sliding contact therewith. The non static electricity generating material is at a position on the cutting stylus body which is contacted by the chip.
摘要翻译： 用于在盘记录介质上切割声槽的触针包括具有凹槽切割部分的金刚石体，用于从盘记录介质产生切屑。 触针还包括由芯片与其滑动接触时不容易产生静电的材料制成的结构。 非静电发生材料位于与芯片接触的切削针体上的位置。
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