公开(公告)号：US20080235796A1

公开(公告)日：2008-09-25

申请号：US12063868

申请日：2006-08-09

申请人： Wolfgang Buhr

发明人： Wolfgang Buhr

IPC分类号： G06F21/00

CPC分类号： G06F21/79 ,  G06F21/755

摘要： In order to further develop a circuit arrangement (100), in particular an integrated circuit, for electronic data processing as well as a method for detecting and/or for registering and/or for signaling the irradiation of at least one non-volatile memory module (10) with at least one light source in order to be capable of securely averting an attack, in particular an E[lectro]M[agnetic] radiation attack, for example a side-channel attack, or in particular a crypto-analysis, for example a current trace analysis or a D[ifferential]P[ower]A[nalysis], such attack or such analysis in particular being targeted on finding out a private key, it is proposed that an access timing for at least one read access to the memory module (10) is generated, in particular that at least one additional read access to the memory module (10) is added in at least one test mode (T), in particular in at least one D[isable]A[ll]W[ordline] mode, this test mode (T) preferably allowing to detect if the memory module (10) is currently exposed to any light of a certain energy.

摘要翻译： 为了进一步开发用于电子数据处理的电路装置（100），特别是集成电路，以及用于检测和/或注册和/或用于发信号通知至少一个非易失性存储器模块 （10）具有至少一个光源，以便能够可靠地避免攻击，特别是E [lectro] M [agnetic]辐射攻击，例如侧信道攻击，或特别是密码分析， 例如当前的跟踪分析或D [分析] A [分析]，这种攻击或这种分析尤其是寻找私钥的目的在于提出至少一个读取访问的访问定时 特别地，至少在一个测试模式（T）中添加对存储器模块（10）的至少一个额外的读取访问，特别是在至少一个D [A] ll] W [ordline]模式，该测试模式（T）优选地允许检测存储器 模块（10）目前暴露于任何一定能量的光。

公开(公告)号：US20060011816A1

公开(公告)日：2006-01-19

申请号：US10536302

申请日：2003-11-13

申请人： Joachim Garbe ,  Wolfgang Buhr

发明人： Joachim Garbe ,  Wolfgang Buhr

IPC分类号： G11C16/22

CPC分类号： G06F21/75 ,  G11C16/22

摘要： In order to further develop a circuit arrangement (100) for electronic data communication, comprising—at least a non-volatile memory module (10) for storing data, and—at least an interface logic (20) associated with the memory module (10)—for addressing the memory module (10) and—for writing data to the memory module (10) or—for reading data from the memory module (10), together with a related method for registering light attacks on the non-volatile memory module (10), in such a way that, firstly, the light attack is recognized immediately and reliably regardless of whether an access, in particular a read access, to the memory module (10) is taking place or not and, secondly, the entire address space of the memory module (10) is covered as uniformly as possible in this regard, it is proposed that at least a monitoring arrangement (22) provided for monitoring the memory module (10) is associated with the interface logic (20), by means of which monitoring arrangement (22) an irradiation of the memory module (10) with at least a light source [so-called “light attack”] can be detected and/or registered and/or signaled in a test mode (T) in which no write or read access to the memory module (10) takes place.

摘要翻译： 为了进一步开发用于电子数据通信的电路装置（100），包括用于存储数据的至少一个非易失性存储器模块（10）以及至少与存储器模块（10）相关联的接口逻辑（20） ） - 用于寻址存储器模块（10），并用于将数据写入存储器模块（10）或用于从存储器模块（10）读取数据，以及用于将光攻击注册到非易失性存储器上的相关方法 模块（10），其特征在于，首先，无论是否对存储器模块（10）进行访问，特别是读取访问，都立即且可靠地识别光攻击，其次， 在这方面，存储模块（10）的整个地址空间被尽可能均匀地被覆盖，所以建议至少提供用于监视存储器模块（10）的监视装置（22）与接口逻辑（20）相关联， ，通过其进行监控 （22）可以以至少一个光源（即所谓的“光攻击”）照射存储器模块（所谓的“光攻击”），并且可以在没有写入的测试模式（T）中检测和/或注册和/或发信号通知 或者对存储器模块（10）进行读取访问。

公开(公告)号：US20050209716A1

公开(公告)日：2005-09-22

申请号：US10500064

申请日：2002-12-12

申请人： Wolfgang Buhr ,  Detlef Mueller

发明人： Wolfgang Buhr ,  Detlef Mueller

IPC分类号： G06F12/02 ,  G06F12/00 ,  G07F7/10 ,  G05B19/42 ,  G11C5/00

CPC分类号： G07F7/1008 ,  G06Q20/341 ,  G06Q20/3552 ,  G06Q20/35765

摘要： The invention describes a method and an arrangement for writing to NV memories in a controller architecture, together with a corresponding computer program product and a corresponding computer-readable storage medium, which may be used in particular to speed up writing or programming processes in NV code memories of microcontrollers, such as for example smart card controllers. The method consists in extending the instruction set of the controller by so-called MOVCWR (move code write) instructions, which make it possible to write a defined data word (byte) to a defined destination address within an NV code memory. The data word (byte) is here written to the correct position of the cache page register of the respective NV memory and the page address pointer register of the memory is updated with the associated page address. If an MMU (memory management unit) is present, this MOVCWR writing to the cache page register takes place, like MOVC reading or code fetch, under the control of this MMU.

摘要翻译： 本发明描述了一种用于在控制器架构中向NV存储器写入的方法和装置，以及相应的计算机程序产品和相应的计算机可读存储介质，其可以特别用于加速NV代码中的写入或编程处理 微控制器的记忆，例如智能卡控制器。 该方法包括通过所谓的MOVCWR（移动代码写入）指令扩展控制器的指令集，这使得可以将定义的数据字（字节）写入NV代码存储器内的定义的目的地地址。 数据字（字节）在这里被写入相应NV存储器的高速缓存页寄存器的正确位置，并且用关联的页地址更新存储器的页地址指针寄存器。 如果存在MMU（存储器管理单元），则在该MMU的控制下，MOVCWR写入高速缓存页寄存器，如MOVC读取或代码提取。

公开(公告)号：US06928510B2

公开(公告)日：2005-08-09

申请号：US10324768

申请日：2002-12-20

申请人： Wolfgang Buhr

发明人： Wolfgang Buhr

IPC分类号： G11C16/02 ,  G06F3/08 ,  G06F13/28 ,  G06K19/07 ,  G11C16/10 ,  G11C16/22 ,  G11C16/34 ,  G06F12/00

CPC分类号： G06F13/28 ,  G11C16/10 ,  G11C16/22 ,  G11C16/3454

摘要： The invention relates to a method and arrangement for programming and verifying EEPROM pages and a corresponding computer software product and a corresponding computer-readable storage medium, which can be used in particular to speed up the programming into the EEPROM of large amounts of data or code, such as occurs for example when smart cards are being personalized.The invention relates to an arrangement that sets up a DMA connection between EEPROM and RAM—not including the core of the microcontroller involved—and makes possible automatic programming of data blocks of random length from the RAM to the EEPROM including the verification of the programming operation against the original data in the RAM under the control of the EEPROM logic.

摘要翻译： 本发明涉及一种用于编程和验证EEPROM页面的方法和装置，以及相应的计算机软件产品和相应的计算机可读存储介质，其特别可用于将编程加速到EEPROM中的大量数据或代码 ，例如当智能卡被个性化时发生。 本发明涉及一种在EEPROM和RAM之间建立DMA连接（不包括所涉及的微控制器的核心）的布置，并且使得可以自动编程从RAM到EEPROM的随机长度的数据块，包括编程操作的验证 在EEPROM逻辑控制下的RAM中的原始数据。

公开(公告)号：US06802027B2

公开(公告)日：2004-10-05

申请号：US10078938

申请日：2002-02-19

申请人： Wolfgang Buhr ,  Detlef Mueller ,  Dieter Hagedorn

发明人： Wolfgang Buhr ,  Detlef Mueller ,  Dieter Hagedorn

IPC分类号： G06F1318

CPC分类号： G07F7/084 ,  G06F11/073 ,  G06F11/0775 ,  G06F21/55 ,  G06F21/79 ,  G06Q20/341 ,  G06Q20/357 ,  G07F7/1008

摘要： To provide an electric or electronic circuit arrangement as well as a method of detecting and/or identifying and/or recording at least an access violation, particularly at least a memory access violation, in a microcontroller provided particularly for a chip card or smart card, with which the source causing this access violation (referred to as break source) as well as the code address occurring upon this violation can be detected and/or identified and/or recorded when an access violation occurs during the program run, the circuit arrangement comprises at least a memory unit; at least an interface unit assigned to the memory unit; at least a processor unit connected to the memory unit particularly via the interface unit for executing instruction codes. These instruction codes can be requested from the interface unit by means of at least a request unit; are run up in at least a fetch or request queue in the request unit; and are decodable by means of at least a decoding unit assigned to the processor unit for running the fetch or request queue, in which a given category of access violation codes is assignable to each given category of access violations. The access violation code replaces the corresponding instruction code, and comprises data such as information on the address, particularly the code address and/or the type and/or the location and/or the source and/or the instant of the access violation.

摘要翻译： 提供电子或电子电路装置以及在特别为芯片卡或智能卡提供的微控制器中至少检测和/或识别和/或记录至少访问冲突，特别是至少存储器访问冲突的方法， 当在程序运行期间发生访问冲突时，引起该访问冲突的源（称为断点）以及在该违规发生的代码地址可被检测和/或识别和/或记录，该电路装置包括 至少存储单元; 至少一个分配给所述存储单元的接口单元; 至少一个处理器单元特别经由用于执行指令代码的接口单元连接到存储器单元。 可以通过至少一个请求单元从接口单元请求这些指令代码; 至少在请求单元中的提取或请求队列中运行; 并且可以通过至少一个分配给处理器单元的用于运行提取或请求队列的解码单元进行解码，其中给定类型的访问冲突代码可分配给每个给定类型的访问冲突。 访问冲突代码替换相应的指令代码，并且包括诸如关于地址的信息，特别是代码地址和/或类型和/或位置和/或访问冲突的源和/或即时的数据。

公开(公告)号：US5642132A

公开(公告)日：1997-06-24

申请号：US362606

申请日：1995-01-10

申请人： Wolfgang Buhr

发明人： Wolfgang Buhr

IPC分类号： G09G5/08

CPC分类号： G09G5/08

摘要： A circuit arrangement for the display of a cursor symbol of variable magnitude addresses the cursor memory by means of a separate addressing device which operates only during display of the cursor field. The organization of the memory for the cursor symbol, constructed as a matrix memory, is fully independent of the rows and columns of the cursor field, i.e. to the cursor symbol the memory appears as a pure linear memory. As a result, this memory can be utilized in a substantially improved manner and the display of even large cursor symbols requires only a limited storage capacity.

摘要翻译： PCT No.PCT / IB94 / 00092 Sec。 371 1995年1月10日第 102（e）日期1995年1月10日PCT提交1994年5月5日PCT公布。 出版物WO94 / 27277 日期1994年11月24日用于显示可变大小的光标符号的电路装置通过仅在光标字段的显示期间操作的单独的寻址装置来解决光标存储器。 被构造为矩阵存储器的光标符号的存储器的组织完全独立于光标字段的行和列，即对于光标符号，存储器显示为纯线性存储器。 结果，可以以显着改进的方式使用该存储器，并且甚至大的光标符号的显示仅需要有限的存储容量。

公开(公告)号：US20120148041A1

公开(公告)日：2012-06-14

申请号：US12967059

申请日：2010-12-14

申请人： Wolfgang BUHR

发明人： Wolfgang BUHR

IPC分类号： H04L9/00 ,  G06F17/00

CPC分类号： H04L9/0877 ,  H04L9/0869 ,  H04L9/0897 ,  H04L2209/805

摘要： A smartcard having a microcontroller kernel and a non-secure memory capable of storing a Random-ID code, where the non-secure memory is electrically coupled to the microcontroller kernel. A random number generator is for generating a new Random-ID code and the random number generator is electrically coupled to the microcontroller kernel. A user interface is electrically coupled to the random number generator so that the user may initiate generation of the new Random-ID code by the random number generator for storage in the non-secure memory.

摘要翻译： 具有微控制器内核和能够存储随机ID代码的非安全存储器的智能卡，其中非安全存储器电耦合到微控制器内核。 随机数生成器用于生成新的随机ID代码，随机数发生器电耦合到微控制器内核。 用户接口电耦合到随机数发生器，使得用户可以通过随机数发生器来发起新的随机ID码的生成以存储在非安全存储器中。

公开(公告)号：US08172150B2

公开(公告)日：2012-05-08

申请号：US12921600

申请日：2009-02-26

申请人： Wolfgang Buhr ,  Birger Rosenberg

发明人： Wolfgang Buhr ,  Birger Rosenberg

IPC分类号： G06K19/06

CPC分类号： G06K7/0008 ,  G06K19/07

摘要： The invention relates to an integrated circuit card (1) comprising: an input/output block (4) for receiving external command data from an interface device (2); a central processing unit (CPU) (3) in signal communication with the input/output block (4) for performing a task corresponding to the received command data; a judgement block (5) in signal communication with the central processing unit (3) for judging whether a working time of the central processing unit (3) reaches a reference time, after an input of the external command data is completed; and a control block (6) in signal communication with the judgement block (5) for operating responsive to an output of the judgement block, wherein the control block controls such that a S(WTX request) is output via the input/output block (4) without intervention by the central processing unit whenever the interface device (2) connected to the integrated circuit card (1) transmits a command to the integrated circuit card and the integrated circuit card is not able to respond to this command within the defined maximum waiting time.

摘要翻译： 本发明涉及一种集成电路卡（1），包括：用于从接口装置（2）接收外部命令数据的输入/输出块（4） 与所述输入/输出块（4）进行信号通信的用于执行与所接收的命令数据相对应的任务的中央处理单元（CPU）（3）; 在所述外部命令数据的输入完成之后，与所述中央处理单元（3）进行信号通信的判断块（5），用于判断所述中央处理单元（3）的工作时间是否到达基准时间; 以及控制块（6），其与所述判断块（5）进行信号通信，用于响应于所述判断块的输出进行操作，其中所述控制块进行控制，使得经由所述输入/输出块输出S（WTX请求） 4）当连接到集成电路卡（1）的接口设备（2）向集成电路卡发送命令并且集成电路卡不能在定义的最大值内对该命令作出响应时，无需中央处理单元的干预 等待的时间。

公开(公告)号：US06337912B2

公开(公告)日：2002-01-08

申请号：US08914444

申请日：1997-08-19

申请人： Wolfgang Buhr ,  Helmut Hörner

发明人： Wolfgang Buhr ,  Helmut Hörner

IPC分类号： H04L912

CPC分类号： G07C9/00857 ,  G07C2009/00769 ,  G07C2009/0088

摘要： In order to unambiguously allocate a data carrier to an object, key information is written into the data carrier. Before writing-in the key information, secret identification information and open identification information is written into the data carrier. Copies of the secret and open information are stored in a central station. In the central station, for a particular data carrier, the open and secret information is associated with each other. In addition thereto, in the central station, object information for the particular object, and key information for the object are associated with each other. From the data carrier, the open identification information is sent to the central station to access the associated stored open and secret identification information so as to retrieve the stored secret identification information. In addition thereto, object information is sent to the central station to access the associated stored object and key information so as to retrieve the stored key information. The retrieved key information is encrypted with the retrieved secret identification information and the encrypted key information is sent to the data carrier. In the data carrier, the received encrypted key information is decrypted. The decrypted key information is written into the data carrier.

摘要翻译： 为了明确地将数据载体分配给对象，将密钥信息写入数据载体。 在写入密钥信息之前，秘密识别信息和开放识别信息被写入数据载体。 秘密和开放信息的副本存储在中心站。 在中央电台，对于特定数据载体，开放和秘密信息相互关联。 除此之外，在中央站中，特定对象的对象信息和对象的关键信息彼此相关联。 从数据载体，将打开的识别信息发送到中心站以访问相关联的存储的打开和秘密识别信息，以便检索所存储的秘密识别信息。 另外，将对象信息发送到中心站以访问相关联的存储对象和密钥信息，以便检索存储的密钥信息。 检索到的密钥信息用检索到的秘密识别信息加密，并且加密的密钥信息被发送到数据载体。 在数据载体中，接收的加密密钥信息被解密。 解密的密钥信息被写入数据载体。

公开(公告)号：US08155309B2

公开(公告)日：2012-04-10

申请号：US12125737

申请日：2008-05-22

申请人： Wolfgang Buhr

发明人： Wolfgang Buhr

IPC分类号： G06F21/00

CPC分类号： G06F21/79

摘要： An apparatus and method is provided for protecting data in a non-volatile memory by using an encryption and decryption that encrypts and decrypts the address and the data stored in the non-volatile memory using a code read only memory that stores encryption and decryption keys that are addressed by a related central processing unit at the same time data is being written or read from the non-volatile memory by the central processing unit.

摘要翻译： 提供了一种用于通过使用加密和解密来加密和解密存储在非易失性存储器中的地址和数据的加密和解密来保护非易失性存储器中的数据的装置和方法，所述代码只读存储器存储加密和解密密钥， 由相关的中央处理单元寻址，同时由中央处理单元从非易失性存储器写入或读取数据。