Abstract:
Techniques for providing vertical integrations of semiconductor chips, magnetic chips, and lead frames. The techniques can include fabricating an integrated circuit (IC) device as a multi-layer IC structure that includes, within a sealed protective enclosure, a first layer including at least one magnetic chip, a second layer including at least one semiconductor chip or die, and a lead frame. The techniques can further include vertically bonding the magnetic chip in the first layer onto the topside of the lead frame, and vertically bonding the semiconductor chip or die in the second layer on top of the magnetic chip to form a multi-layer IC structure.
Abstract:
A laminated transformer-type transmitter-receiver device for transmitting or delivering electrical signals and/or power. The laminated device can include two metal shielding layers disposed between transmit and receive windings, which, in turn, are disposed between two magnetic layers. The laminated device further includes a dielectric isolation layer disposed between the two metal shielding layers. In the laminated device, no (or very little) common mode capacitance is distributed within the dielectric isolation layer, and no (or very little) common mode or “leakage” current flows across the dielectric isolation layer. As a result, various adverse effects of the common mode capacitance and the leakage current during operation of the laminated device are avoided.
Abstract:
Techniques for providing vertical integrations of semiconductor chips, magnetic chips, and lead frames. The techniques can include fabricating an integrated circuit (IC) device as a multi-layer IC structure that includes, within a sealed protective enclosure, a first layer including at least one magnetic chip, a second layer including at least one semiconductor chip or die, and a lead frame. The techniques can further include vertically bonding the magnetic chip in the first layer onto the topside of the lead frame, and vertically bonding the semiconductor chip or die in the second layer on top of the magnetic chip to form a multi-layer IC structure.
Abstract:
An electrode includes a first free-standing carbon network, an active material deposited above the first free-standing carbon network, and a second free-standing carbon network covering the active material. The first and second carbon networks are a binder, a conductive additive and a current collector to the electrode.
Abstract:
A shielding structure includes a frame and a removable plate. The frame includes a peripheral wall, and the removable plate located in the opening may be fixed to the connecting board, the removable plate defining an access hole. A scored line is defined between the removable plate and the connecting board. The shielding structure further defines an arcuate gap between the removable plate and the connecting board and communicating with the scored line, and a mating hole, the arcuate gap is for increasing the shearing stresses on shielding structure the scored line when the removable plate must be removed.
Abstract:
Water absorption resistant polyimide pastes (or solutions), are particularly useful to make electronic screen printable pastes and the electronic components made from these pastes. A group of soluble polyimides and their solvents were discovered to be particularly resistant to moisture absorption. These polyimide solutions optionally contain polyimides also containing cross-linkable monomers and/or thermal cross-linking agents. In addition, these polyimide pastes may optionally contain adhesion promoting agents, blocked isocyanates, metals, metal oxides, and other inorganic fillers. The polyimide pastes (or solutions) of the present invention have a polyimide with a glass transition temperature greater than 250° C., have a water absorption factor of less than 2%, and a have a positive solubility measurement.
Abstract:
A method for extracting edge with subpixel accuracy in photogrammetry, comprising steps of: a. capturing into a computer a picture, of which the edge is to be extracted; b. defining as a cell four neighboring pixels that form a square; c. recognizing the type of each cell composed of the four pixels; d. finding out side or sides of the cell that intersect with,the edge and figuring out the subpixel accuracy coordinates of the intersection points by linear interpolation; and e. connecting the intersection points to extract the edge. By this method edge curve is extracted rapidly and accurately. The edge determined in this way can be subpixel accurate.
Abstract:
A method includes combining a coating material and an uncoated particulate core material in a solution having a selected ionic strength. The selected ionic strength promotes coating of the uncoated particulate core material with the coating material to form coated particles; and the coated particles can be collected after formation. The coating material has a higher electrical conductivity than the core material.
Abstract:
The present invention discloses a method for quickly implementing an interior design scheme, including: step 1) design of a prototype room, dividing and setting a room into functional areas according to a type of a room, designing each of the functional areas in three sizes, that is, a large size, a medium size and a small size, and with a design style by a designer; step 2) designing a prototype room by each designer, forming the functional areas and recording them in an easily-implemented system, according to an easily-implemented protocol and rule, and in an easily-implemented computer description language, functions and formulas; step 3) transforming the designed prototype room into computer description language and formulas, and transferring it to a cloud platform, and synchronizing it to software of any hypostatic store in any place across the world; and step 4) in a hypostatic store, adjusting sizes of the functional areas, arranging positions of the functional areas and selecting a prototype room according to the type of the room, and transforming functions and formulas of a previously designed prototype room scheme into a three-dimensional stereo and presenting the three-dimensional stereo immediately by a computer.