公开(公告)号：US20240027522A1

公开(公告)日：2024-01-25

申请号：US18354771

申请日：2023-07-19

Applicant: ADVANTEST CORPORATION

Inventor： Takayuki TANAKA ,  Tasuku FUJIBE

IPC: G01R31/28 ,  G01R1/073

CPC classification number: G01R31/2887 ,  G01R31/2893 ,  G01R31/2889 ,  G01R1/07328 ,  G01R1/07357

Abstract: An interface device is provided between a test head and a DUT. The interface device includes pin electronics ICs, RAM, a pin controller, and nonvolatile memory. The RAM stores data based on a device signal received from the DUT by means of the multiple pin electronics ICs. The pin controller controls the multiple pin electronics ICs according to a control signal from the test head. The multiple pin electronics ICs, the RAM, and the pin controller are mounted on a pin electronics PCB.

公开(公告)号：US20240027523A1

公开(公告)日：2024-01-25

申请号：US18354789

申请日：2023-07-19

Applicant: ADVANTEST CORPORATION

Inventor： Hiroki ICHIKAWA ,  Tasuku FUJIBE

IPC: G01R31/28 ,  G01R1/073

CPC classification number: G01R31/2887 ,  G01R31/2893 ,  G01R31/2889 ,  G01R1/07328 ,  G01R1/07357

Abstract: An interface device is provided between a test head and a device under test (DUT). A socket board includes sockets each configured to mount a DUT, and a socket PCB having a first face that mounts the sockets and a second face provided with multiple back face electrodes. An interposer has a first face provided with multiple deformable electrodes and a second face provided with multiple non-deformable electrodes and is configured such that the multiple deformable electrodes are in contact with the multiple back face electrodes of the socket PCB. An FPC cable has multiple electrode pads to be coupled with the multiple non-deformable electrodes on the second face of the first interposer.

公开(公告)号：US20240027521A1

公开(公告)日：2024-01-25

申请号：US18354255

申请日：2023-07-18

Applicant: ADVANTEST CORPORATION

Inventor： Hiroki ICHIKAWA ,  Tasuku FUJIBE

IPC: G01R31/28 ,  G01R1/073

CPC classification number: G01R31/2887 ,  G01R31/2893 ,  G01R31/2889 ,  G01R1/07328 ,  G01R1/07357

Abstract: An interface device is provided between a test head and a DUT. In the interface device, each pin electronics IC is coupled to a DUT via an FPC cable.

公开(公告)号：US20240027520A1

公开(公告)日：2024-01-25

申请号：US18354198

申请日：2023-07-18

Applicant: ADVANTEST CORPORATION

Inventor： Hiroki ICHIKAWA ,  Satoshi SUDO ,  Tasuku FUJIBE

IPC: G01R31/28 ,  G01R1/073

CPC classification number: G01R31/2887 ,  G01R31/2893 ,  G01R31/2889 ,  G01R1/07328 ,  G01R1/07357

Abstract: An interface apparatus is provided between a test head and a DUT. The interface apparatus includes a frontend module configured of multiple pin electronics ICs in the form of a module.