公开(公告)号：US07747237B2

公开(公告)日：2010-06-29

申请号：US10821531

申请日：2004-04-09

申请人： Akbar Ali ,  James P. Young

发明人： Akbar Ali ,  James P. Young

IPC分类号： H04B1/06 ,  H04B7/00

CPC分类号： H03L7/22

摘要： A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

摘要翻译： 提供了一种高灵敏度的低相位噪声频率合成器，用于快速产生频率特定信号。 频率合成器能够在保持低交叉耦合的同时快速产生不同输出频率的信号。 两个或更多个信号发生器利用参考频率来产生两个或更多个信号。 这些信号被限制处理，以便在呈现给开关之前减少交叉耦合。 响应于控制信号，开关将一个信号输出到频率修改装置，例如分频器或乘法器。 响应于控制信号，频率修改装置缩放开关输出的频率，以将开关输出信号的频率转换为期望的输出频率。 通过在开关输入信号之间保持足够的频率间隔，交叉耦合和相位噪声被最小化，并且可以实现集成电路上的实现。

公开(公告)号：US20110037501A1

公开(公告)日：2011-02-17

申请号：US12803550

申请日：2010-06-28

申请人： Akbar Ali ,  James P. Young

发明人： Akbar Ali ,  James P. Young

IPC分类号： H03B21/00

CPC分类号： H03L7/22

摘要： A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

摘要翻译： 提供了一种高灵敏度的低相位噪声频率合成器，用于快速产生频率特定信号。 频率合成器能够在保持低交叉耦合的同时快速产生不同输出频率的信号。 两个或更多个信号发生器利用参考频率来产生两个或更多个信号。 这些信号被限制处理，以便在呈现给开关之前减少交叉耦合。 响应于控制信号，开关将一个信号输出到频率修改装置，例如分频器或乘法器。 响应于控制信号，频率修改装置缩放开关输出的频率，以将开关输出信号的频率转换为期望的输出频率。 通过在开关输入信号之间保持足够的频率间隔，交叉耦合和相位噪声被最小化，并且可以实现集成电路上的实现。

公开(公告)号：US09350367B2

公开(公告)日：2016-05-24

申请号：US12803550

申请日：2010-06-28

申请人： Akbar Ali ,  James P. Young

发明人： Akbar Ali ,  James P. Young

IPC分类号： H04B1/06 ,  H04B7/00 ,  H03L7/22

CPC分类号： H03L7/22

摘要： A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

摘要翻译： 提供了一种高灵敏度的低相位噪声频率合成器，用于快速产生频率特定信号。 频率合成器能够在保持低交叉耦合的同时快速产生不同输出频率的信号。 两个或更多个信号发生器利用参考频率来产生两个或更多个信号。 这些信号被限制处理，以便在呈现给开关之前减少交叉耦合。 响应于控制信号，开关将一个信号输出到频率修改装置，例如分频器或乘法器。 响应于控制信号，频率修改装置缩放开关输出的频率，以将开关输出信号的频率转换为期望的输出频率。 通过在开关输入信号之间保持足够的频率间隔，交叉耦合和相位噪声被最小化，并且可以实现集成电路上的实现。

公开(公告)号：US07109805B2

公开(公告)日：2006-09-19

申请号：US10902746

申请日：2004-07-29

申请人： Chang-Hyeon Lee ,  Hoon Lee ,  Akbar Ali

发明人： Chang-Hyeon Lee ,  Hoon Lee ,  Akbar Ali

IPC分类号： H03L7/00 ,  H03C3/06 ,  H03M3/00

CPC分类号： H03C3/0933 ,  H03C3/0925

摘要： A system for direct modulation is disclosed. Embodiments of the direct modulator for shift-keying modulation include impressing baseband data on a radio frequency (RF) signal at an oscillator by controlling a digital divider using a sigma-delta modulator.

摘要翻译： 公开了一种用于直接调制的系统。 用于移位键控调制的直接调制器的实施例包括通过使用Σ-Δ调制器控制数字分频器在振荡器处对射频（RF）信号施加基带数据。

公开(公告)号：US20050227629A1

公开(公告)日：2005-10-13

申请号：US10821531

申请日：2004-04-09

申请人： Akbar Ali ,  James Young

发明人： Akbar Ali ,  James Young

IPC分类号： H03L7/22 ,  H04B1/38

CPC分类号： H03L7/22

摘要： A highly agile low phase noise frequency synthesizer is provided for rapid generation of frequency specific signals. The frequency synthesizer is capable of rapidly generating signals at different output frequencies while maintaining low cross-coupling. Two or more signal generators utilize a reference frequency to generate two or more signals. These signals are limit processed to reduce cross-coupling prior to being presented to a switch. Responsive to a control signal, the switch outputs one of the signals to a frequency modification device, such as a frequency divider or multiplier. Responsive to a control signal, the frequency modification device scales the frequency of the switch output to convert the frequency of the switch output signal to a desired output frequency. By maintaining sufficient frequency separation between the switch input signals cross-coupling and phase noise is minimized and implementation on an integrated circuit may be achieved.

摘要翻译： 提供了一种高灵敏度的低相位噪声频率合成器，用于快速产生频率特定信号。 频率合成器能够在保持低交叉耦合的同时快速产生不同输出频率的信号。 两个或更多个信号发生器利用参考频率来产生两个或更多个信号。 这些信号被限制处理，以便在呈现给开关之前减少交叉耦合。 响应于控制信号，开关将一个信号输出到频率修改装置，例如分频器或乘法器。 响应于控制信号，频率修改装置缩放开关输出的频率，以将开关输出信号的频率转换为期望的输出频率。 通过在开关输入信号之间保持足够的频率间隔，交叉耦合和相位噪声被最小化，并且可以实现集成电路上的实现。

公开(公告)号：US07259633B2

公开(公告)日：2007-08-21

申请号：US11137210

申请日：2005-05-24

申请人： Chang-Hyeon Lee ,  Akbar Ali

发明人： Chang-Hyeon Lee ,  Akbar Ali

IPC分类号： H03L7/00 ,  H03L7/093

CPC分类号： H03L7/093 ,  H03C3/0925 ,  H03C3/0933 ,  H03L7/07 ,  H03L7/0891 ,  H03L7/197 ,  H03L7/1976

摘要： According to one exemplary embodiment, a frequency synthesizer module includes a loop filter, where the loop filter includes a capacitor having a first terminal and a second terminal. The frequency synthesizer module further includes a loop filter calibration module coupled to the capacitor in the loop filter. The loop filter calibration module causes an initial capacitance between the first terminal and the second terminal of the capacitor to increase to a target capacitance when the loop filter is in a calibration mode. The target capacitance can causes in increase in control of a bandwidth of the loop filter and a reduction in percent error of a unity gain bandwidth of the loop filter. The loop filter further includes a switched capacitor array configured to cause the initial capacitance to increase to the target capacitance in response to a digital feedback signal provided by the loop filter calibration module.

摘要翻译： 根据一个示例性实施例，频率合成器模块包括环路滤波器，其中环路滤波器包括具有第一端子和第二端子的电容器。 频率合成器模块还包括耦合到环路滤波器中的电容器的环路滤波器校准模块。 当环路滤波器处于校准模式时，环路滤波器校准模块使得电容器的第一端子和第二端子之间的初始电容增加到目标电容。 目标电容可以导致环路滤波器的带宽的控制的增加和环路滤波器的单位增益带宽的百分比误差的减小。 环路滤波器还包括开关电容器阵列，其被配置为响应于由环路滤波器校准模块提供的数字反馈信号而使初始电容增加到目标电容。

公开(公告)号：US20060267697A1

公开(公告)日：2006-11-30

申请号：US11137210

申请日：2005-05-24

申请人： Chang-Hyeon Lee ,  Akbar Ali

发明人： Chang-Hyeon Lee ,  Akbar Ali

IPC分类号： H03L7/00

CPC分类号： H03L7/093 ,  H03C3/0925 ,  H03C3/0933 ,  H03L7/07 ,  H03L7/0891 ,  H03L7/197 ,  H03L7/1976

摘要： According to one exemplary embodiment, a frequency synthesizer module includes a loop filter, where the loop filter includes a capacitor having a first terminal and a second terminal. The frequency synthesizer module further includes a loop filter calibration module coupled to the capacitor in the loop filter. The loop filter calibration module causes an initial capacitance between the first terminal and the second terminal of the capacitor to increase to a target capacitance when the loop filter is in a calibration mode. The target capacitance can causes in increase in control of a bandwidth of the loop filter and a reduction in percent error of a unity gain bandwidth of the loop filter. The loop filter further includes a switched capacitor array configured to cause the initial capacitance to increase to the target capacitance in response to a digital feedback signal provided by the loop filter calibration module.

摘要翻译： 根据一个示例性实施例，频率合成器模块包括环路滤波器，其中环路滤波器包括具有第一端子和第二端子的电容器。 频率合成器模块还包括耦合到环路滤波器中的电容器的环路滤波器校准模块。 当环路滤波器处于校准模式时，环路滤波器校准模块使得电容器的第一端子和第二端子之间的初始电容增加到目标电容。 目标电容可以导致环路滤波器的带宽的控制的增加和环路滤波器的单位增益带宽的百分比误差的减小。 环路滤波器还包括开关电容器阵列，其被配置为响应于由环路滤波器校准模块提供的数字反馈信号而使初始电容增加到目标电容。

公开(公告)号：US06377129B1

公开(公告)日：2002-04-23

申请号：US09302754

申请日：1999-04-30

申请人： Woogeun Rhee ,  Akbar Ali

发明人： Woogeun Rhee ,  Akbar Ali

IPC分类号： H03K3282

CPC分类号： H03K3/354

摘要： An oscillator has a slope-fixing circuit that generates a control signal and fixes the slope of the control signal, a swing-fixing circuit that fixes the swing of the control signal, and a switching block that generates an output signal having a frequency derived from the swing and the slope of the control signal. The slope-fixing circuit comprises a fixed timing capacitor C1 in parallel with a plurality of switchable timing capacitors C2 . . . CN to provide an effective capacitance C. The slope of the control signal is determined by the ratio of a control current I to the effective capacitance C. The swing-fixing circuit comprises a replica cell that accepts a programmable reference voltage VREF and provides a fixed voltage swing VSW=VDD−VREF across a pair of load transistors. The switching block comprises a pair of switching transistors that alternate between “on” and “off” states depending on the value of the control signal to produce an oscillating output signal. The frequency of the output signal is given by I 4 ⁢ CV SW .

摘要翻译： 振荡器具有产生控制信号并固定控制信号的斜率的斜坡固定电路，固定控制信号的摆动的摆动固定电路以及产生具有从...得到的频率的输出信号的开关块 控制信号的摆幅和斜率。 斜坡固定电路包括与多个可切换定时电容器C2并联的固定定时电容器C1。 。 。 CN以提供有效电容C.控制信号的斜率由控制电流I与有效电容C的比确定。摆幅固定电路包括接受可编程参考电压VREF的复制单元并提供固定的 一对负载晶体管的摆幅VSW = VDD-VREF。 切换块包括一对开关晶体管，其根据控制信号的值在“导通”和“断开”状态之间交替以产生振荡输出信号。 输出信号的频率由下式给出

公开(公告)号：US06292046B1

公开(公告)日：2001-09-18

申请号：US09163675

申请日：1998-09-30

申请人： Akbar Ali

发明人： Akbar Ali

IPC分类号： H03K508

CPC分类号： H01L27/0266

摘要： The present invention relates to a circuit for protecting inputs and outputs on semiconductor devices. The protective circuit is particularly useful on high-speed inputs or outputs (such as in radio frequency applications where signal frequency is on the order of 100 MHz or greater and where it is necessary to minimize capacitive loading. Briefly, the present invention utilizes two FETs to shunt harmful electrostatic charges to a low impedance power bus and protect input and output circuit elements from damage or degradation. When a high voltage transient surge is detected, the drain-gate capacitance of one of the FETs couples the voltage to the gate electrode and biases one of the two transistors in the low impedance state so that the surge is absorbed without damage to the input or output circuit. Significantly, the capacitive loading of the protection circuit of the present invention is typically a fraction of a picoFarad and more particularly on the order of several hundred femtofarads.

摘要翻译： 本发明涉及用于保护半导体器件上的输入和输出的电路。 保护电路对于高速输入或输出特别有用（例如在信号频率在100MHz以上的射频应用中，需要最小化电容负载的场合，简而言之，本发明利用两个FET 将有害的静电电荷分流到低阻抗电源总线，并保护输入和输出电路元件免受损坏或退化。当检测到高压瞬态浪涌时，其中一个FET的漏极 - 栅极电容将电压耦合到栅电极， 偏置处于低阻态的两个晶体管中的一个，使得浪涌被吸收而不损坏输入或输出电路。重要的是，本发明的保护电路的电容负载通常是微微法的一小部分，更特别是 数百毫微法的顺序。

公开(公告)号：US06281758B1

公开(公告)日：2001-08-28

申请号：US09409509

申请日：1999-09-30

申请人： Ayman M. Elsayed ,  Akbar Ali

发明人： Ayman M. Elsayed ,  Akbar Ali

IPC分类号： H03B512

CPC分类号： H03L7/099 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B2201/0208 ,  H03L7/0896

摘要： A differential LC-based voltage-controlled oscillator (LC-VCO), charge pump and loop filter architecture for providing improved noise immunity in integrated phase-locked loops (PLLs). A pair of voltage control signals are provided from a differential charge pump and loop filter architecture to respective voltage control inputs in the LC-VCO to differentially control the LC-VCO. The voltage control inputs are connected to respective terminals on opposite ends of a varactor tuning circuit. The differential voltage applied across the varactor tuning circuit determines the LC characteristics of the varactor tuning circuit which, in turn, determines the operating frequency of the VCO. One of the voltage control inputs is passed through an operational amplifier buffering stage before being transmitted to its respective terminal in the varactor tuning circuit. The LC-VCO utilizes a PMOS transistor core to provide good substrate isolation and low flicker (1/f) noise. The PMOS core further eliminates parasitic diode problems while maintaining the whole supply range for tuning. The differentially-controlled LC-VCO is integrated into a PLL using a differential charge pump having a simple common mode correction circuit which does not require a clean reference signal. The differential LC-VCO and charge pump architecture of the present invention reduces the sensitivity of the components to supply, ground, and substrate noise without a significant increase in power consumption and without sacrificing the tuning range of the LC-VCO.

摘要翻译： 基于差分LC的压控振荡器（LC-VCO），电荷泵和环路滤波器架构，可在集成锁相环（PLL）中提供改进的抗噪声能力。 一对电压控制信号从差分电荷泵和环路滤波器架构提供到LC-VCO中的相应电压控制输入端，以差分控制LC-VCO。 电压控制输入端连接到变容二极管调谐电路的两端的各个端子。 施加在变容二极管调谐电路两端的差分电压决定了变容二极管调谐电路的LC特性，这又决定了VCO的工作频率。 其中一个电压控制输入在传输到变容二极管调谐电路中的相应端子之前通过运算放大器缓冲级。 LC-VCO利用PMOS晶体管内核提供良好的衬底隔离和低闪烁（1 / f）噪声。 PMOS芯进一步消除了寄生二极管问题，同时保持了整个供电范围进行调谐。 使用差分电荷泵将差分控制的LC-VCO集成到PLL中，该差分电荷泵具有简单的共模校正电路，其不需要清洁的参考信号。 本发明的差分LC-VCO和电荷泵结构降低了组件对电源，接地和衬底噪声的灵敏度，而不会显着增加功耗并且不牺牲LC-VCO的调谐范围。