公开(公告)号：US11210990B2

公开(公告)日：2021-12-28

申请号：US16325260

申请日：2017-08-15

Applicant: Apple Inc.

Inventor： Ivan Knez ,  Cheuk Chi Lo ,  Akira Matsudaira ,  Chun-Yao Huang ,  Giovanni Carbone ,  Paolo Sacchetto ,  Chaohao Wang ,  Sheng Zhang ,  Adam Adjiwibawa

IPC: G09G3/20 ,  G09G5/36 ,  G09G5/391 ,  G09G5/397

Abstract: An electronic device may have a display and a gaze tracking system. The electronic device may display images on the display that have a higher resolution in a portion of the display that overlaps a gaze location than other portions of the display. Timing controller circuitry and column driver circuitry may include interpolation and filter circuitry. The interpolation and filter circuitry may be used to perform nearest neighbor interpolation and two-dimensional spatial filtering on low resolution image data. Display driver circuitry may be configured to load higher resolution data into selected portions of a display. The display driver circuitry may include low and high resolution image data buffers and configurable row driver circuitry. Block enable transistors may be included in a display to allow selected blocks of pixels to be loaded with high resolution image data.

公开(公告)号：US20190180672A1

公开(公告)日：2019-06-13

申请号：US16325260

申请日：2017-08-15

Applicant: Apple Inc.

Inventor： Ivan Knez ,  Cheuk Chi Lo ,  Akira Matsudaira ,  Chun-Yao Huang ,  Giovanni Carbone ,  Paolo Sacchetto ,  Chaohao Wang ,  Sheng Zhang ,  Adam Adjiwibawa

IPC: G09G3/20 ,  G09G5/391 ,  G09G5/36 ,  G09G5/397

Abstract: An electronic device may have a display and a gaze tracking system. The electronic device may display images on the display that have a higher resolution in a portion of the display that overlaps a gaze location than other portions of the display. Timing controller circuitry and column driver circuitry may include interpolation and filter circuitry. The interpolation and filter circuitry may be used to perform nearest neighbor interpolation and two-dimensional spatial filtering on low resolution image data. Display driver circuitry may be configured to load higher resolution data into selected portions of a display. The display driver circuitry may include low and high resolution image data buffers and configurable row driver circuitry. Block enable transistors may be included in a display to allow selected blocks of pixels to be loaded with high resolution image data.

公开(公告)号：US20220181418A1

公开(公告)日：2022-06-09

申请号：US17504230

申请日：2021-10-18

Applicant: Apple Inc.

Inventor： Jung Yen Huang ,  Shinya Ono ,  Chin-Wei Lin ,  Akira Matsudaira ,  Cheng Min Hu ,  Chih Pang Chang ,  Ching-Sang Chuang ,  Gihoon Choo ,  Jiun-Jye Chang ,  Po-Chun Yeh ,  Shih Chang Chang ,  Yu-Wen Liu ,  Zino Lee

IPC: H01L27/32 ,  H01L29/786 ,  H01L29/66

Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated semiconducting oxide transistors. The semiconducting oxide transistors may exhibit different device characteristics. Some of the semiconducting oxide transistors may be formed using a first oxide layer formed from a first semiconducting oxide material using first processing steps, whereas other semiconducting oxide transistors are formed using a second oxide layer formed from a second semiconducting oxide material using second processing steps different than the first processing steps. The display may include three or more different semiconducting oxide layers formed during different processing steps.

公开(公告)号：US20210305353A1

公开(公告)日：2021-09-30

申请号：US17143939

申请日：2021-01-07

Applicant: Apple Inc.

Inventor： Shinya Ono ,  Chin-Wei Lin ,  Akira Matsudaira ,  Jiun-Jye Chang ,  Jung Yen Huang ,  Pei-En Chang ,  Rungrot Kitsomboonloha ,  Szu-Hsien Lee

IPC: H01L27/32 ,  G09G3/3266 ,  G09G3/3225

Abstract: An electronic device may include a display with pixels formed using light-emitting diodes, thin-film silicon transistors, thin-film semiconducting-oxide transistors, and capacitors. The silicon transistors, semiconducting-transistors, and capacitors may have control terminals that are coupled to gate or routing lines that extend across the face of the display and that are formed in a low resistance source-drain metal routing layer. Forming routing/gate lines using the low resistance source-drain metal routing layer dramatically reduces the resistance of the gate lines, which enables better timing margins for large display panels operating at higher refresh rates.

公开(公告)号：US11462608B2

公开(公告)日：2022-10-04

申请号：US17143939

申请日：2021-01-07

Applicant: Apple Inc.

Inventor： Shinya Ono ,  Chin-Wei Lin ,  Akira Matsudaira ,  Jiun-Jye Chang ,  Jung Yen Huang ,  Pei-En Chang ,  Rungrot Kitsomboonloha ,  Szu-Hsien Lee

IPC: G09G3/3225 ,  G09G3/3266 ,  H01L27/32 ,  H01L29/786 ,  H01L27/12 ,  H01L29/49

Abstract: An electronic device may include a display with pixels formed using light-emitting diodes, thin-film silicon transistors, thin-film semiconducting-oxide transistors, and capacitors. The silicon transistors, semiconducting-transistors, and capacitors may have control terminals that are coupled to gate or routing lines that extend across the face of the display and that are formed in a low resistance source-drain metal routing layer. Forming routing/gate lines using the low resistance source-drain metal routing layer dramatically reduces the resistance of the gate lines, which enables better timing margins for large display panels operating at higher refresh rates.

公开(公告)号：US12096657B2

公开(公告)日：2024-09-17

申请号：US17504230

申请日：2021-10-18

Applicant: Apple Inc.

Inventor： Jung Yen Huang ,  Shinya Ono ,  Chin-Wei Lin ,  Akira Matsudaira ,  Cheng Min Hu ,  Chih Pang Chang ,  Ching-Sang Chuang ,  Gihoon Choo ,  Jiun-Jye Chang ,  Po-Chun Yeh ,  Shih Chang Chang ,  Yu-Wen Liu ,  Zino Lee

IPC: H01L27/32 ,  H01L29/66 ,  H01L29/786 ,  H10K59/121 ,  H10K59/12

CPC classification number: H10K59/1213 ,  H01L29/66742 ,  H01L29/7869 ,  H10K59/1216 ,  H10K59/1201

Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated semiconducting oxide transistors. The semiconducting oxide transistors may exhibit different device characteristics. Some of the semiconducting oxide transistors may be formed using a first oxide layer formed from a first semiconducting oxide material using first processing steps, whereas other semiconducting oxide transistors are formed using a second oxide layer formed from a second semiconducting oxide material using second processing steps different than the first processing steps. The display may include three or more different semiconducting oxide layers formed during different processing steps.