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1.
公开(公告)号:US20140307506A1
公开(公告)日:2014-10-16
申请号:US14315529
申请日:2014-06-26
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte
CPC classification number: G11C11/5628 , G11C5/04 , G11C5/145 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/24 , G11C16/30 , G11C29/78
Abstract: A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined voltage to each flash memory die of the flash memory dies, and an interface is adapted to receive instructions for controlling the charge pump.
Abstract translation: 用于存储数据的系统和方法使用多个闪速存储器管芯。 每个闪存芯片包括多个闪存单元。 电荷泵适于以预定电压向闪存芯片的每个闪速存储器管芯提供电荷,并且接口适于接收用于控制电荷泵的指令。
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公开(公告)号:US20140010014A1
公开(公告)日:2014-01-09
申请号:US14022586
申请日:2013-09-10
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte
IPC: G11C16/10
CPC classification number: G11C16/10 , G06F12/0246 , G06F12/0866 , G06F2212/214 , G06F2212/7201
Abstract: Systems and processes may use a first memory, a second memory, and a memory controller. The second memory is at least as large as a block of the first memory. Data is received and stored in the second memory for further writing to the second memory.
Abstract translation: 系统和过程可以使用第一存储器,第二存储器和存储器控制器。 第二存储器至少与第一存储器的块一样大。 数据被接收并存储在第二存储器中用于进一步写入到第二存储器。
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3.
公开(公告)号:US20130272065A1
公开(公告)日:2013-10-17
申请号:US13913722
申请日:2013-06-10
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte
IPC: G11C16/10
CPC classification number: G11C11/5628 , G11C5/04 , G11C5/145 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/24 , G11C16/30 , G11C29/78
Abstract: A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined voltage to each flash memory die of the flash memory dies, and an interface is adapted to receive instructions for controlling the charge pump.
Abstract translation: 用于存储数据的系统和方法使用多个闪速存储器管芯。 每个闪存芯片包括多个闪存单元。 电荷泵适于以预定电压向闪存芯片的每个闪速存储器管芯提供电荷,并且接口适于接收用于控制电荷泵的指令。
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公开(公告)号:US09158608B2
公开(公告)日:2015-10-13
申请号:US14291316
申请日:2014-05-30
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte , Nir Jacob Wakrat
CPC classification number: G06F11/0727 , G06F3/0679 , G06F11/0742 , G06F11/0748 , G06F11/0766 , G06F11/0778 , G06F12/0246
Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.
Abstract translation: 系统和过程可用于从便携式设备的非易失性存储器检索元数据,并将所检索的元数据发送到外部主机。 可以使用外部主机来分析元数据,和/或可以基于分析修改元数据的至少一部分。 修改的元数据可以从外部主机发送到主机的存储器控制器。
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公开(公告)号:US09110787B2
公开(公告)日:2015-08-18
申请号:US14160763
申请日:2014-01-22
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte , Nir Jacob Wakrat
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F12/0253 , G06F2212/1016 , G06F2212/7211
Abstract: Systems and processes may use a host and an external host. The host may be a portable device that includes a memory, a memory controller, and a communication interface for communication with the external host. The portable device may receive a command signal from the external host and initiate a predetermined amount of wear leveling in response to the command signal.
Abstract translation: 系统和进程可以使用主机和外部主机。 主机可以是包括存储器,存储器控制器和用于与外部主机通信的通信接口的便携式设备。 便携式设备可以从外部主机接收命令信号,并响应于命令信号启动预定量的磨损均衡。
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6.
公开(公告)号:US20140313826A1
公开(公告)日:2014-10-23
申请号:US14322496
申请日:2014-07-02
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte
CPC classification number: G11C11/5628 , G11C5/04 , G11C5/145 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/24 , G11C16/30 , G11C29/78
Abstract: A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined voltage to each flash memory die of the flash memory dies, and an interface is adapted to receive instructions for controlling the charge pump.
Abstract translation: 用于存储数据的系统和方法使用多个闪速存储器管芯。 每个闪存芯片包括多个闪存单元。 电荷泵适于以预定电压向闪存芯片的每个闪速存储器管芯提供电荷,并且接口适于接收用于控制电荷泵的指令。
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公开(公告)号:US20140281176A1
公开(公告)日:2014-09-18
申请号:US14291316
申请日:2014-05-30
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte , Nir Jacob Wakrat
CPC classification number: G06F11/0727 , G06F3/0679 , G06F11/0742 , G06F11/0748 , G06F11/0766 , G06F11/0778 , G06F12/0246
Abstract: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified metadata may be transmitted from the external host to a memory controller of the host.
Abstract translation: 系统和过程可用于从便携式设备的非易失性存储器检索元数据,并将所检索的元数据发送到外部主机。 可以使用外部主机来分析元数据,和/或可以基于分析修改元数据的至少一部分。 修改的元数据可以从外部主机发送到主机的存储器控制器。
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公开(公告)号:US20140146604A1
公开(公告)日:2014-05-29
申请号:US14168219
申请日:2014-01-30
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte
IPC: G11C16/06
CPC classification number: G11C16/06 , G06F11/1068 , G11C16/26 , G11C2029/0411
Abstract: A partial voltage level read is made on memory cells of a solid state memory device during a voltage settling time after the memory cells are charged (e.g., by a pulse from a charge pump). Digital values representing partial voltage levels are checked for errors (e.g., by an error correction code (ECC) engine). If the values can be corrected, then the values are released for host access. If the values cannot be corrected, then a full voltage read is performed on the memory cells after the voltage levels have substantially settled. Digital values corresponding to the full voltage reads can be released for host access. The use of partial voltage reads results in faster read of solid state memory devices.
Abstract translation: 在存储器单元被充电之后的电压建立时间(例如,通过来自电荷泵的脉冲)期间,在固态存储器件的存储器单元上进行部分电压电平读取。 检查表示部分电压电平的数字值是否存在错误(例如,通过纠错码(ECC)引擎)。 如果可以更正这些值,则释放主机访问的值。 如果这些值无法校正,则在电压电平基本稳定后,对存储单元执行全电压读取。 可以释放与全电压读数相对应的数字值,以进行主机访问。 使用部分电压读数可以更快地读取固态存储器件。
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公开(公告)号:US09361987B2
公开(公告)日:2016-06-07
申请号:US14022586
申请日:2013-09-10
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte
CPC classification number: G11C16/10 , G06F12/0246 , G06F12/0866 , G06F2212/214 , G06F2212/7201
Abstract: Systems and processes may use a first memory, a second memory, and a memory controller. The second memory is at least as large as a block of the first memory. Data is received and stored in the second memory for further writing to the second memory.
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公开(公告)号:US09245616B2
公开(公告)日:2016-01-26
申请号:US14716574
申请日:2015-05-19
Applicant: Apple Inc.
Inventor: Michael J. Cornwell , Christopher P. Dudte
CPC classification number: G11C11/5628 , G11C5/04 , G11C5/145 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/24 , G11C16/30 , G11C29/78
Abstract: A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined voltage to each flash memory die of the flash memory dies, and an interface is adapted to receive instructions for controlling the charge pump.
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