公开(公告)号：US20250155883A1

公开(公告)日：2025-05-15

申请号：US18939065

申请日：2024-11-06

Applicant: Applied Materials, Inc.

Inventor： Prashanth Kothnur ,  Ala Moradian ,  Umesh Madhav Kelkar ,  Phillip Stout ,  Badri Ramamurthi ,  Karthik Ramanathan ,  Ananth Bhoj ,  Dalong Zhao

IPC: G05B19/418

Abstract: In one aspect of the present disclosure, a method includes obtaining, by a processing device, input data indicative of a first set of process parameters. The method further includes providing the input data to a first process model. The method further includes obtaining, from the first process model, first predictive output indicative of performance of a first process operation in accordance with the first set of process parameters. The method further includes providing the first predictive output to a second process model. The method further includes obtaining, from the second process model, second predictive output indicative of performance of a second process operation, different than the first process operation or a repetition of the first process operation, in accordance with the first set of process parameters. The method further includes performing a corrective action in view of the second predictive output.

公开(公告)号：US12027607B2

公开(公告)日：2024-07-02

申请号：US17843968

申请日：2022-06-18

Applicant: Applied Materials, Inc.

Inventor： Benjamin Colombeau ,  Matthias Bauer ,  Naved Ahmed Siddiqui ,  Phillip Stout

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L29/66742 ,  H01L21/02532 ,  H01L21/02538 ,  H01L21/02603 ,  H01L21/02636 ,  H01L21/823807 ,  H01L21/823828 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66522 ,  H01L29/66545 ,  H01L29/78696

Abstract: Electronic devices and methods of forming electronic devices with gate-all-around non-I/O devices and finlike structures for I/O devices are described. A plurality of dummy gates is etched to expose a fin comprising alternating layers of a first material and a second material. The second material layers are removed to create openings and the first material layers remaining are epitaxially grown to form a finlike structure.

公开(公告)号：US20220320318A1

公开(公告)日：2022-10-06

申请号：US17843968

申请日：2022-06-18

Applicant: Applied Materials, Inc.

Inventor： Benjamin Colombeau ,  Matthias Bauer ,  Naved Ahmed Siddiqui ,  Phillip Stout

IPC: H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/8238

Abstract: Electronic devices and methods of forming electronic devices with gate-all-around non-I/O devices and finlike structures for I/O devices are described. A plurality of dummy gates is etched to expose a fin comprising alternating layers of a first material and a second material. The second material layers are removed to create openings and the first material layers remaining are epitaxially grown to form a finlike structure.

公开(公告)号：US20210119021A1

公开(公告)日：2021-04-22

申请号：US17077153

申请日：2020-10-22

Applicant: Applied Materials, Inc.

Inventor： Benjamin Colombeau ,  Matthias Bauer ,  Naved Ahmed Siddiqui ,  Phillip Stout

IPC: H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/02 ,  H01L21/8238

Abstract: Electronic devices and methods of forming electronic devices with gate-all-around non-I/O devices and finlike structures for I/O devices are described. A plurality of dummy gates is etched to expose a fin comprising alternating layers of a first material and a second material. The second material layers are removed to create openings and the first material layers remaining are epitaxially grown to form a finlike structure.

公开(公告)号：US08962488B2

公开(公告)日：2015-02-24

申请号：US13849729

申请日：2013-03-25

Applicant: Applied Materials, Inc.

Inventor： Bryan Liao ,  Katsumasa Kawasaki ,  Yashaswini Pattar ,  Sergio Fukuda Shoji ,  Duy D. Nguyen ,  Kartik Ramaswamy ,  Ankur Agarwal ,  Phillip Stout ,  Shahid Rauf

IPC: H01L21/302 ,  C23F1/00 ,  H01J37/32 ,  H01L21/311

CPC classification number: C23F1/00 ,  H01J37/32082 ,  H01J37/32146 ,  H01J37/32165 ,  H01L21/31116

Abstract: Methods for processing a substrate are provided herein. In some embodiments, a method of etching a dielectric layer includes generating a plasma by pulsing a first RF source signal having a first duty cycle; applying a second RF bias signal having a second duty cycle to the plasma; applying a third RF bias signal having a third duty cycle to the plasma, wherein the first, second, and third signals are synchronized; adjusting a phase variance between the first RF source signal and at least one of the second or third RF bias signals to control at least one of plasma ion density non-uniformity in the plasma or charge build-up on the dielectric layer; and etching the dielectric layer with the plasma.

Abstract translation: 本文提供了处理基板的方法。 在一些实施例中，蚀刻介电层的方法包括通过脉冲具有第一占空比的第一RF源信号来产生等离子体; 向所述等离子体施加具有第二占空比的第二RF偏置信号; 向所述等离子体施加具有第三占空比的第三RF偏置信号，其中所述第一，第二和第三信号被同步; 调整所述第一RF源信号和所述第二或第三RF偏置信号中的至少一个之间的相位差，以控制所述等离子体中的等离子体或电荷积聚中的等离子体离子密度不均匀性中的至少一个; 并用等离子体蚀刻电介质层。