Fuse corner pad for an integrated circuit
    1.
    发明申请
    Fuse corner pad for an integrated circuit 有权
    用于集成电路的保险丝角垫

    公开(公告)号:US20050167825A1

    公开(公告)日:2005-08-04

    申请号:US10767739

    申请日:2004-01-30

    摘要: A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are used inside of the fuse corner pad for programmability (e.g., for security) and/or adjustment (e.g., trimming) of analog and/or digital signals. The fuse contact and fuse element are not required to be bonded to an external electrical connection (such as, a pin or ball). The auxiliary pads provide a variety of functional or non-functional applications, such as testing, probing, programming, and/or circuit adjustment.

    摘要翻译: 保险丝拐角垫是集成电路的一部分,其包括内置保险丝触点和多个辅助垫。 保险丝触点是连接到熔丝元件的导电金属或准金属结构。 保险丝触点和熔丝元件在保险丝拐角垫内部用于可编程(例如,用于安全性)和/或调整(例如,修整)模拟和/或数字信号。 保险丝触点和熔丝元件不需要与外部电气连接(例如针或球)接合。 辅助焊盘提供各种功能或非功能应用,例如测试,探测,编程和/或电路调整。

    Fuse corner pad for an integrated circuit
    2.
    发明授权
    Fuse corner pad for an integrated circuit 有权
    用于集成电路的保险丝角垫

    公开(公告)号:US08013422B2

    公开(公告)日:2011-09-06

    申请号:US12719685

    申请日:2010-03-08

    IPC分类号: H01L29/76

    摘要: A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are used inside of the fuse corner pad for programmability (e.g., for security) and/or adjustment (e.g., trimming) of analog and/or digital signals. The fuse contact and fuse element are not required to be bonded to an external electrical connection (such as, a pin or ball). The auxiliary pads provide a variety of functional or non-functional applications, such as testing, probing, programming, and/or circuit adjustment.

    摘要翻译: 保险丝拐角垫是集成电路的一部分,其包括内置保险丝触点和多个辅助垫。 保险丝触点是连接到熔丝元件的导电金属或准金属结构。 保险丝触点和熔丝元件在保险丝拐角垫内部用于可编程(例如,用于安全性)和/或调整(例如,修整)模拟和/或数字信号。 保险丝触点和熔丝元件不需要与外部电气连接(例如针或球)接合。 辅助焊盘提供各种功能或非功能应用,例如测试,探测,编程和/或电路调整。

    Fuse corner pad for an integrated circuit
    3.
    发明授权
    Fuse corner pad for an integrated circuit 有权
    用于集成电路的保险丝角垫

    公开(公告)号:US07208776B2

    公开(公告)日:2007-04-24

    申请号:US10767739

    申请日:2004-01-30

    IPC分类号: H01L29/74 H01L31/111

    摘要: A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are used inside of the fuse corner pad for programmability (e.g., for security) and/or adjustment (e.g., trimming) of analog and/or digital signals. The fuse contact and fuse element are not required to be bonded to an external electrical connection (such as, a pin or ball). The auxiliary pads provide a variety of functional or non-functional applications, such as testing, probing, programming, and/or circuit adjustment.

    摘要翻译: 保险丝拐角垫是集成电路的一部分,其包括内置保险丝触点和多个辅助垫。 保险丝触点是连接到熔丝元件的导电金属或准金属结构。 保险丝触点和熔丝元件在保险丝拐角垫内部用于可编程(例如,用于安全性)和/或调整(例如,修整)模拟和/或数字信号。 保险丝触点和熔丝元件不需要与外部电气连接(例如针或球)接合。 辅助焊盘提供各种功能或非功能应用,例如测试,探测,编程和/或电路调整。

    Fuse Corner Pad for an Integrated Circuit
    4.
    发明申请
    Fuse Corner Pad for an Integrated Circuit 有权
    用于集成电路的保险丝角垫

    公开(公告)号:US20100155885A1

    公开(公告)日:2010-06-24

    申请号:US12719685

    申请日:2010-03-08

    IPC分类号: H01L23/525

    摘要: A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are used inside of the fuse corner pad for programmability (e.g., for security) and/or adjustment (e.g., trimming) of analog and/or digital signals. The fuse contact and fuse element are not required to be bonded to an external electrical connection (such as, a pin or ball). The auxiliary pads provide a variety of functional or non-functional applications, such as testing, probing, programming, and/or circuit adjustment.

    摘要翻译: 保险丝拐角垫是集成电路的一部分,其包括内置保险丝触点和多个辅助垫。 保险丝触点是连接到熔丝元件的导电金属或准金属结构。 保险丝触点和熔丝元件在保险丝拐角垫内部用于可编程(例如,用于安全性)和/或调整(例如,修整)模拟和/或数字信号。 保险丝触点和熔丝元件不需要与外部电气连接(例如针或球)接合。 辅助焊盘提供各种功能或非功能应用,例如测试,探测,编程和/或电路调整。

    Fuse corner pad for an integrated circuit
    5.
    发明授权
    Fuse corner pad for an integrated circuit 有权
    用于集成电路的保险丝角垫

    公开(公告)号:US07687880B2

    公开(公告)日:2010-03-30

    申请号:US11783731

    申请日:2007-04-11

    IPC分类号: H01L29/76

    摘要: A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are used inside of the fuse corner pad for programmability (e.g., for security) and/or adjustment (e.g., trimming) of analog and/or digital signals. The fuse contact and fuse element are not required to be bonded to an external electrical connection (such as, a pin or ball). The auxiliary pads provide a variety of functional or non-functional applications, such as testing, probing, programming, and/or circuit adjustment.

    摘要翻译: 保险丝拐角垫是集成电路的一部分,其包括内置保险丝触点和多个辅助垫。 保险丝触点是连接到熔丝元件的导电金属或准金属结构。 保险丝触点和熔丝元件在保险丝拐角垫内部用于可编程(例如,用于安全性)和/或调整(例如,修整)模拟和/或数字信号。 保险丝触点和熔丝元件不需要与外部电气连接(例如针或球)接合。 辅助焊盘提供各种功能或非功能应用,例如测试,探测,编程和/或电路调整。

    Fuse corner pad for an integrated circuit

    公开(公告)号:US20070246797A1

    公开(公告)日:2007-10-25

    申请号:US11783731

    申请日:2007-04-11

    IPC分类号: G11C17/18

    摘要: A fuse corner pad is part of an integrated circuit that includes a built-in fuse contact and a plurality of auxiliary pads. The fuse contact is a conductive metallic or metalloid structure that is connected to a fuse element. The fuse contact and fuse element are used inside of the fuse corner pad for programmability (e.g., for security) and/or adjustment (e.g., trimming) of analog and/or digital signals. The fuse contact and fuse element are not required to be bonded to an external electrical connection (such as, a pin or ball). The auxiliary pads provide a variety of functional or non-functional applications, such as testing, probing, programming, and/or circuit adjustment.

    Method for selective gate halo implantation in a semiconductor die and related structure
    7.
    发明授权
    Method for selective gate halo implantation in a semiconductor die and related structure 有权
    半导体晶片中选择性栅晕注入的方法及相关结构

    公开(公告)号:US08089118B2

    公开(公告)日:2012-01-03

    申请号:US12456065

    申请日:2009-06-10

    摘要: According to one embodiment, a method for selective gate halo implantation includes forming at least one gate having a first orientation and at least one gate having a second orientation over a substrate. The method further includes performing a halo implant over the substrate. The first orientation allows a halo implanted area to be formed under the at least one gate having the first orientation and the second orientation prevents a halo implanted area from forming under the at least one gate having the second orientation. The halo implant is performed without forming a mask over the at least one gate having the first orientation or the at least one gate having the second orientation. The at least one gate having the first orientation can be used in a low voltage region of a substrate, while the at least one gate having the second orientation can be used in a high voltage region.

    摘要翻译: 根据一个实施例,用于选择性栅极晕晕注入的方法包括在衬底上形成具有第一取向的至少一个栅极和具有第二取向的至少一个栅极。 该方法还包括在衬底上执行晕轮植入。 第一取向允许在具有第一取向的至少一个栅极下方形成光晕注入区域,并且第二取向防止在具有第二取向的至少一个栅极下形成光晕注入区域。 在没有在具有第一取向的至少一个栅极或具有第二取向的至少一个栅极上形成掩模的情况下执行光晕注入。 具有第一取向的至少一个栅极可用于衬底的低电压区域,而具有第二取向的至少一个栅极可用于高电压区域。

    Multiprotocol computer bus interface adapter and method
    8.
    发明申请
    Multiprotocol computer bus interface adapter and method 有权
    多协议计算机总线接口适配器和方法

    公开(公告)号:US20050066212A1

    公开(公告)日:2005-03-24

    申请号:US10990657

    申请日:2004-11-17

    CPC分类号: G06F1/10 G06F2213/0024

    摘要: A predictive time base generator having predictive synchronizer and replica delay element coupled with the synchronizer feedback delay loop. The predictive time base generator receives a clock signal delayed by a predetermined clock delay and produces a predictive time signal advanced in time by an amount represented by the replica delay element. The replica delay element can replicate one or both of a predetermined clock delay and a predetermined data delay, substantially nullifying the respective delays in critical signal paths of a device. The replica delay element can include replicas of structure(s) found in an incoming clock path and an outgoing data path, such elements including, for example, voltage level shifters, buffers or data latches, multiplexers, wire element models, and the like. A predictive computer bus interface adapter which incorporates the aforementioned predictive time base generator also is provided. Such a predictive interface adapter can be adapted to be observant of stringent bus protocol timing budgets imposed under the PCI and PCI-X local bus protocol, and to be robust relative to variations in design and fabrication processes, and environmental operating conditions.

    摘要翻译: 具有与同步器反馈延迟环耦合的预测同步器和复制延迟元件的预测时基发生器。 预测时基发生器接收延迟了预定时钟延迟的时钟信号,并产生一个预测时间信号,该预测时间信号在时间上提前由复制延迟元件表示的量。 复制延迟元件可以复制预定时钟延迟和预定数据延迟中的一个或两个,从而基本上使设备的关键信号路径中的相应延迟无效。 复制延迟元件可以包括在输入时钟路径和输出数据路径中找到的结构的副本,这些元件包括例如电压电平移位器,缓冲器或数据锁存器,多路复用器,线元模型等。 还提供了一种包含上述预测时基发生器的预测计算机总线接口适配器。 这种预测接口适配器可以适应于遵守在PCI和PCI-X局部总线协议下施加的严格总线协议时序预算,并且相对于设计和制造过程以及环境操作条件的变化而言是稳健的。

    Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction
    9.
    发明授权
    Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction 失效
    用于允许以与单个字跳转指令相同的周期数来执行两个字跳转指令的计算机系统

    公开(公告)号:US06243798B1

    公开(公告)日:2001-06-05

    申请号:US08958940

    申请日:1997-10-28

    IPC分类号: G06F1202

    CPC分类号: G06F9/3802 G06F9/3816

    摘要: A system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction, thereby allowing a processor system to increase memory space without reducing performance. A first address bus is coupled to the linearized program memory for sending addresses of instructions to be fetched to a linearized program memory. A pointer is coupled to the first address bus for storing an address location of a current instruction in the linearized program memory to be fetched and for placing the address location of the current instruction to be fetched on the first address bus. A second address bus is provided and has one end coupled to the output of the program memory and a second end coupled to the first address bus. The second address bus is used for placing an address of an operand of a second word of the two word jump instruction onto the first address bus after an address of an operand of a first word of the two word jump instruction has been placed on the first address bus. This allows the addresses of the first word and the second word to be combined to provide the full address value of the two word jump instruction in the same number of cycles as a single word jump instruction.

    摘要翻译: 用于允许以与单个字跳转指令相同的周期数来执行两个字跳转指令的系统,从而允许处理器系统增加存储器空间而不降低性能。 第一地址总线耦合到线性化程序存储器,用于发送要获取的指令的地址到线性化程序存储器。 指针耦合到第一地址总线,用于存储要获取的线性化程序存储器中的当前指令的地址位置,并将要提取的当前指令的地址位置放置在第一地址总线上。 提供第二地址总线,其一端耦合到程序存储器的输出端,第二端耦合到第一地址总线。 第二地址总线用于在双字跳转指令的第一字的操作数的地址已经被放置在第一地址总线上之后,将两字跳转指令的第二字的操作数的地址放置在第一地址总线上 地址总线 这允许将第一个字和第二个字的地址组合起来,以与单个字跳转指令相同的周期数来提供两个字跳转指令的完整地址值。

    Method for selective gate halo implantation in a semiconductor die and related structure
    10.
    发明申请
    Method for selective gate halo implantation in a semiconductor die and related structure 有权
    半导体晶片中选择性栅晕注入的方法及相关结构

    公开(公告)号:US20100314691A1

    公开(公告)日:2010-12-16

    申请号:US12456065

    申请日:2009-06-10

    IPC分类号: H01L29/78 H01L21/336

    摘要: According to one embodiment, a method for selective gate halo implantation includes forming at least one gate having a first orientation and at least one gate having a second orientation over a substrate. The method further includes performing a halo implant over the substrate. The first orientation allows a halo implanted area to be formed under the at least one gate having the first orientation and the second orientation prevents a halo implanted area from forming under the at least one gate having the second orientation. The halo implant is performed without forming a mask over the at least one gate having the first orientation or the at least one gate having the second orientation. The at least one gate having the first orientation can be used in a low voltage region of a substrate, while the at least one gate having the second orientation can be used in a high voltage region.

    摘要翻译: 根据一个实施例,用于选择性栅极晕晕注入的方法包括在衬底上形成具有第一取向的至少一个栅极和具有第二取向的至少一个栅极。 该方法还包括在衬底上执行晕轮植入。 第一取向允许在具有第一取向的至少一个栅极下方形成光晕注入区域,并且第二取向防止在具有第二取向的至少一个栅极下形成光晕注入区域。 在没有在具有第一取向的至少一个栅极或具有第二取向的至少一个栅极上形成掩模的情况下执行光晕注入。 具有第一取向的至少一个栅极可用于衬底的低电压区域,而具有第二取向的至少一个栅极可用于高电压区域。