Method for selective gate halo implantation in a semiconductor die and related structure
    1.
    发明申请
    Method for selective gate halo implantation in a semiconductor die and related structure 有权
    半导体晶片中选择性栅晕注入的方法及相关结构

    公开(公告)号:US20100314691A1

    公开(公告)日:2010-12-16

    申请号:US12456065

    申请日:2009-06-10

    IPC分类号: H01L29/78 H01L21/336

    摘要: According to one embodiment, a method for selective gate halo implantation includes forming at least one gate having a first orientation and at least one gate having a second orientation over a substrate. The method further includes performing a halo implant over the substrate. The first orientation allows a halo implanted area to be formed under the at least one gate having the first orientation and the second orientation prevents a halo implanted area from forming under the at least one gate having the second orientation. The halo implant is performed without forming a mask over the at least one gate having the first orientation or the at least one gate having the second orientation. The at least one gate having the first orientation can be used in a low voltage region of a substrate, while the at least one gate having the second orientation can be used in a high voltage region.

    摘要翻译: 根据一个实施例,用于选择性栅极晕晕注入的方法包括在衬底上形成具有第一取向的至少一个栅极和具有第二取向的至少一个栅极。 该方法还包括在衬底上执行晕轮植入。 第一取向允许在具有第一取向的至少一个栅极下方形成光晕注入区域,并且第二取向防止在具有第二取向的至少一个栅极下形成光晕注入区域。 在没有在具有第一取向的至少一个栅极或具有第二取向的至少一个栅极上形成掩模的情况下执行光晕注入。 具有第一取向的至少一个栅极可用于衬底的低电压区域,而具有第二取向的至少一个栅极可用于高电压区域。

    Method for selective gate halo implantation in a semiconductor die and related structure
    2.
    发明授权
    Method for selective gate halo implantation in a semiconductor die and related structure 有权
    半导体晶片中选择性栅晕注入的方法及相关结构

    公开(公告)号:US08089118B2

    公开(公告)日:2012-01-03

    申请号:US12456065

    申请日:2009-06-10

    摘要: According to one embodiment, a method for selective gate halo implantation includes forming at least one gate having a first orientation and at least one gate having a second orientation over a substrate. The method further includes performing a halo implant over the substrate. The first orientation allows a halo implanted area to be formed under the at least one gate having the first orientation and the second orientation prevents a halo implanted area from forming under the at least one gate having the second orientation. The halo implant is performed without forming a mask over the at least one gate having the first orientation or the at least one gate having the second orientation. The at least one gate having the first orientation can be used in a low voltage region of a substrate, while the at least one gate having the second orientation can be used in a high voltage region.

    摘要翻译: 根据一个实施例,用于选择性栅极晕晕注入的方法包括在衬底上形成具有第一取向的至少一个栅极和具有第二取向的至少一个栅极。 该方法还包括在衬底上执行晕轮植入。 第一取向允许在具有第一取向的至少一个栅极下方形成光晕注入区域,并且第二取向防止在具有第二取向的至少一个栅极下形成光晕注入区域。 在没有在具有第一取向的至少一个栅极或具有第二取向的至少一个栅极上形成掩模的情况下执行光晕注入。 具有第一取向的至少一个栅极可用于衬底的低电压区域,而具有第二取向的至少一个栅极可用于高电压区域。

    SEMICONDUCTOR SEAL RING DESIGN FOR NOISE ISOLATION
    4.
    发明申请
    SEMICONDUCTOR SEAL RING DESIGN FOR NOISE ISOLATION 审中-公开
    用于噪声隔离的半导体密封圈设计

    公开(公告)号:US20130328158A1

    公开(公告)日:2013-12-12

    申请号:US13493079

    申请日:2012-06-11

    IPC分类号: H01L27/06

    摘要: A semiconductor structure includes a substrate layer and a conductive layer connected with the substrate layer. An active circuit is connected with the conductive layer. A seal ring is connected with the conductive layer and separated from the active circuit by an assembly isolation region. An electrical isolation region is positioned in the conductive layer and adjacent to the assembly isolation region, where the electrical isolation region extends to the substrate layer.

    摘要翻译: 半导体结构包括衬底层和与衬底层连接的导电层。 有源电路与导电层连接。 密封环与导电层连接,并通过组装隔离区与有源电路分离。 电隔离区域位于导电层中并且邻近组件隔离区域,其中电隔离区域延伸到衬底层。