Abstract:
A regulated inverter circuit wherein leading edge pulse width modulation is obtained by employing a modulator control network synchronized with the sinusoidal feedback bias which delays the application of this bias for an interval determined by load voltage variations. Deleting the leading edge of the sinusoidal driving waveform allows the inverter transistors to be efficiently biased from cutoff to saturation and at the same time eliminates the adverse effects of stored charge when the transistors are driven from saturation to cutoff.
Abstract:
The duty cycle of the switching transistor in a DC to DC converter is controlled by an astable multivibrator whose alternate switching states are respectively responsive to the line and load voltages. Feedback of the output voltage to control the duration of one state of the multivibrator is obtained from the primary of the converter output transformer whose magnetic energy level is not allowed to fully dissipate in any one operating cycle. A balancing circuit arrangement is utilized to minimize variations in the base drive signal of the switching transistor and to prevent it from saturating to eliminate variations in the duration of the conducting state of the transistor due to charge storage.