公开(公告)号：US11711946B2

公开(公告)日：2023-07-25

申请号：US17052575

申请日：2020-04-01

Applicant: BOE Technology Group Co., Ltd.

Inventor： Hongda Sun ,  Qing Dai ,  Fengjuan Liu

IPC: H01L27/32 ,  H10K59/122 ,  H10K71/00 ,  H10K71/13 ,  H10K59/12 ,  H10K102/00

CPC classification number: H10K59/122 ,  H10K71/00 ,  H10K71/135 ,  H10K59/1201 ,  H10K2102/351

Abstract: The present disclosure provides a substrate comprising a printing area, wherein the printing area comprises a flat surface and a plurality of separation structures projecting from the flat surface, wherein the plurality of separation structures divide the printing area into a plurality of micro-areas, and in each of the micro-areas, a circular region containing no separation structure has a maximum diameter between 5 μm and 10 μm. The present disclosure further provides a light emitting device comprising the substrate and a method for manufacturing the substrate.

公开(公告)号：US11557638B2

公开(公告)日：2023-01-17

申请号：US16908913

申请日：2020-06-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hongda Sun ,  Fengjuan Liu ,  Wei Liu ,  Jianye Zhang

IPC: H01L27/14 ,  H01L27/32 ,  H01L27/12

Abstract: An array substrate, a display panel including the array substrate, and a fabrication method of the array substrate are provided. The array substrate includes a base substrate, a light-shielding portion, a thin-film transistor and a capacitor. The light-shielding portion is formed on a first surface of the base substrate. The thin-film transistor is formed on a side of the light-shielding portion away from the base substrate, and includes an active layer. The capacitor is formed on the first surface of the base substrate, and includes a first capacitive electrode and a second capacitive electrode. The first capacitive electrode and the second capacitive electrode are at least partially arranged opposite to each other in a direction perpendicular to the first surface of the base substrate. The first capacitive electrode is provided in a same layer as the light-shielding portion.

公开(公告)号：US11335893B2

公开(公告)日：2022-05-17

申请号：US16955195

申请日：2019-12-19

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ying Han ,  Wei Liu ,  Jianye Zhang ,  Fengjuan Liu ,  Xing Zhang

IPC: H01L51/56 ,  H01L27/32 ,  H01L51/00 ,  H01L51/52

Abstract: A manufacturing method of OLED microcavity structure is provided. The manufacturing method includes: forming a reflective anode on a substrate; forming a transparent conductive film layer having a thickness corresponding to a required pixel on the reflective anode; patterning the transparent conductive film layer and the reflective anode with a pixel mask corresponding to the required pixel to form a pattern of the required pixel; and repeating the above steps on a resultant structure surface according to display requirements until a pixel display structure required by a display device is obtained.

公开(公告)号：US11302822B2

公开(公告)日：2022-04-12

申请号：US16618941

申请日：2019-05-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fengjuan Liu ,  Donghui Yu

IPC: H01L29/786 ,  H01L27/32 ,  H01L29/66 ,  H01L51/56

Abstract: A thin film transistor and a fabrication method thereof, an array substrate and a fabrication method thereof are disclosed. The thin film transistor includes: a base substrate; a gate electrode, an active layer, a source electrode and a drain electrode on the base substrate; and the thin film transistor further includes: a light-shielding portion between the active layer and the base substrate, the light-shielding portion includes a groove, and the active layer is in the groove.

公开(公告)号：US11101443B2

公开(公告)日：2021-08-24

申请号：US16616768

申请日：2019-03-15

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wei Li ,  Xing Zhang ,  Fengjuan Liu

IPC: H01L51/50 ,  H01L27/32 ,  H01L51/52 ,  H01L51/56

Abstract: Disclosed are an organic electroluminescence display panel, a manufacturing method therefor, and a display device. The organic electroluminescence display panel comprises an array substrate and an opposite substrate which are disposed opposite to each other; the opposite substrate comprises a first base substrate and multiple spacers located on the first base substrate, and the array substrate comprises a second base substrate, multiple sub pixels located on the second base substrate, a pixel defining layer for defining regions of the sub pixels, and elastomers located on the pixel defining layer and having one-to-one correspondence to at least part of the spacers in terms of position; the elastomers are compressed by the corresponding spacers during cell aligning to buffer the pressure applied to the array substrate.

公开(公告)号：US09659975B2

公开(公告)日：2017-05-23

申请号：US14436576

申请日：2014-09-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Meili Wang ,  Fengjuan Liu ,  Chunsheng Jiang

IPC: H01L21/44 ,  H01L27/12 ,  G02F1/1343

CPC classification number: H01L27/1244 ,  G02F1/13439 ,  G02F2001/134372 ,  H01L27/1259

Abstract: Fabrication methods of a transparent conductive electrode (301) and an array substrate are provided. The fabrication method of the transparent conductive electrode (301) comprises: forming a sacrificial layer pattern (201) on a substrate (10) having a first region (A1) and a second region (A2) adjacent to each other, wherein the sacrificial layer pattern (201) is located in the second region (A2), and has an upper sharp corner profile formed on a side adjacent to the first region (A1); forming a transparent conductive thin-film (30) in the first region (A1) and the second region (A2) of the substrate (10) with the sacrificial layer pattern (201) formed thereon, wherein a thickness ratio of the transparent conductive thin-film (30) to the sacrificial layer pattern (201) is less than or equal to 1:1.5, and the transparent conductive thin-film (30) is disconnected at the upper sharp corner profile of the sacrificial layer pattern (201), such that at least a part of a side surface of the sacrificial layer pattern (201) facing the first region (A1) is exposed; and removing the sacrificial layer pattern (201) so as to reserve the transparent conductive thin-film (30) in the first region as the transparent conductive electrode (301).

公开(公告)号：US20160268314A1

公开(公告)日：2016-09-15

申请号：US14654329

申请日：2014-09-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiangyong Kong ,  Fengjuan Liu

IPC: H01L27/12 ,  H01L29/45 ,  H01L51/52 ,  H01L21/285 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/3205 ,  H01L29/49 ,  H01L51/56

CPC classification number: H01L27/1218 ,  H01L21/02178 ,  H01L21/02244 ,  H01L21/02247 ,  H01L21/02255 ,  H01L21/2855 ,  H01L21/32051 ,  H01L21/32133 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/41 ,  H01L29/45 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/78636 ,  H01L51/5206 ,  H01L51/5221 ,  H01L51/56 ,  H01L2251/301 ,  H01L2251/558

Abstract: A base and a manufacturing method thereof and a display device are provided, so that a problem of faultage of an insulating layer when forming the insulating layer on an aluminum electrode of a substrate is solved. The base includes an aluminum electrode in a first setting pattern on a substrate, and an aluminum oxide layer or an aluminum nitride layer (3) in a second setting pattern provided in a same layer with the aluminum electrode. The first setting pattern and the second setting pattern are complementary to each other.

Abstract translation: 提供了一种基底及其制造方法和显示装置，从而解决了在基板的铝电极上形成绝缘层时绝缘层发生故障的问题。 基底包括在基板上的第一设置图案中的铝电极和设置在与铝电极相同的层中的第二设置图案的氧化铝层或氮化铝层（3）。 第一设置模式和第二设置模式彼此互补。

公开(公告)号：US20250142886A1

公开(公告)日：2025-05-01

申请号：US18686647

申请日：2021-08-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangcai Yuan ,  Lingyan Liang ,  Hongtao Cao ,  Fengjuan Liu ,  Ce Ning ,  Fei Wang ,  Hehe Hu ,  Hengbo Zhang

IPC: H10D30/67 ,  H10D62/10 ,  H10D86/40

Abstract: A thin film transistor includes a substrate; and a semiconductor layer a gate, a source electrode and a drain electrode; which are arranged on the substrate. The semiconductor layer includes a first material layer and a second material layer which are stacked, wherein a material of the first material layer is selected from one of or a combination of first n-type metal oxide semiconductor materials, and a material of the second material layer is selected from one of or a combination of second n-type metal oxide semiconductor materials. A carrier mobility of a first n-type metal oxide semiconductor material is greater than or equal to 40 cm2/Vs, and a second n-type metal oxide semiconductor material is doped with Y, Y being selected from one of or a combination of rare earth elements. The first material layer is closer to the gate than the second material layer.

公开(公告)号：US11183142B2

公开(公告)日：2021-11-23

申请号：US16493429

申请日：2019-05-06

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fengjuan Liu ,  Ying Han

IPC: H01L29/04 ,  G09G5/00 ,  H01L33/14

Abstract: The present disclosure relates to a thin film transistor. The thin film transistor may include a substrate, a source electrode on the substrate, a drain electrode on the substrate, a gate on the substrate, and an active layer on the substrate. The source electrode may include a first teeth portion. The drain electrode may include a second teeth portion. The gate may include a third teeth portion. The active layer may include a plurality of channel regions. The first teeth portion, the second teeth portion, the third teeth portion, and the active layer form a plurality of sub-thin film transistors connected in parallel. The center sub-thin film transistor has a channel region having a smallest width-to-length ratio among the plurality of sub-thin film transistors.

公开(公告)号：US10833107B2

公开(公告)日：2020-11-10

申请号：US16322266

申请日：2018-05-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fengjuan Liu ,  Youngsuk Song ,  Hongda Sun

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/417

Abstract: Provided are a thin film transistor and manufacturing method therefor, and an array substrate, and a display device. The method includes: forming a source electrode and a drain electrode on a substrate; forming a photoresist layer at the side of the source electrode and the drain electrode away from the substrate; performing exposure and developing treatment on the photoresist layer so as to obtain a photoresist pattern; successively forming a semiconductor layer, a first insulation layer and a conducting layer in sequence on at the side of the photoresist pattern away from the substrate; and removing the photoresist pattern so as to obtain an active layer a gate insulation layer and a gate electrode.