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    INTEGRATED CIRCUIT WITH CALIBRATED PULLING EFFECT CORRECTION
    2.
    发明申请
    INTEGRATED CIRCUIT WITH CALIBRATED PULLING EFFECT CORRECTION 有权
    具有校准推挽效应校正的集成电路

    公开(公告)号：US20140191815A1

    公开(公告)日：2014-07-10

    申请号：US13802408

    申请日：2013-03-13

    Applicant: BROADCOM CORPORATION

    Inventor： Ahmad MIRZAEI ,  Hooman DARABI

    IPC: H03L7/085

    CPC classification number: H03L7/099 ,  H03L7/06 ,  H03L7/085 ,  H03L7/101 ,  H03L7/18 ,  H03L2207/14 ,  H04B1/0475 ,  H04B1/525 ,  H04B2001/0491

    Abstract: A frequency-control circuit includes a phase frequency detector configured to receive a reference frequency signal and generate an output detection signal. The phase frequency detector can be configured to detect a difference in phase and frequency between the reference frequency signal and a feedback of the output frequency signal. The frequency-control circuit also includes a frequency divider that is configured to apply a correction voltage to a feedback of the output frequency signal, the correction voltage being a function of a pulling signal having one or more unwanted frequency components. The frequency-control circuit also includes a loop filter configured to filter the output detection signal including the correction voltage and generate a control voltage signal. The frequency-control circuit also includes a voltage-controlled oscillator configured to receive the control voltage signal and generate an output frequency signal.

    Abstract translation: 频率控制电路包括被配置为接收参考频率信号并产生输出检测信号的相位频率检测器。 相位频率检测器可以被配置为检测参考频率信号和输出频率信号的反馈之间的相位和频率的差异。 频率控制电路还包括分频器，其被配置为将校正电压施加到输出频率信号的反馈，校正电压是具有一个或多个不需要的频率分量的拉动信号的函数。 频率控制电路还包括环路滤波器，其被配置为对包括校正电压的输出检测信号进行滤波并产生控制电压信号。 频率控制电路还包括被配置为接收控制电压信号并产生输出频率信号的压控振荡器。

    RECEIVER ARCHITECTURE WITH COMPLEMENTARY PASSIVE MIXER AND COMPLEMENTARY COMMON-GATE TIA WITH LOW-NOISE GAIN CONTROL
    3.
    发明申请
    RECEIVER ARCHITECTURE WITH COMPLEMENTARY PASSIVE MIXER AND COMPLEMENTARY COMMON-GATE TIA WITH LOW-NOISE GAIN CONTROL 有权
    带有补充无源混频器的接收机架构和具有低噪声增益控制的补充通用

    公开(公告)号：US20140171003A1

    公开(公告)日：2014-06-19

    申请号：US13719076

    申请日：2012-12-18

    Applicant: BROADCOM CORPORATION

    Inventor： Mohyee MIKHEMAR ,  Hooman DARABI

    IPC: H04B1/16 ,  H05K13/00

    CPC classification number: H04B1/16 ,  H03D7/1441 ,  H03D7/1466 ,  H03F1/086 ,  H03F3/45179 ,  H03F2203/45306 ,  H04B1/0003 ,  Y10T29/49117

    Abstract: A circuit for a low-power and blocker-tolerant mixer-amplifier stage may include a complementary mixer formed by transmission gates having complementary structures. The complementary mixer may be configured to receive one or more radio-frequency (RF) signals and to convert the one or more RF signals to intermediate frequency (IF) current signals. A complementary TIA may be coupled to the complementary mixer and may be configured to receive the IF current signals and provide IF voltage signals. The complementary TIA may be formed by coupling an NMOS-TIA and a PMOS-TIA to a common load. A first portion of the complementary mixer may be coupled to the NMOS-TIA and a second portion of the complementary mixer may be coupled to the PMOS-TIA.

    Abstract translation: 用于低功率和容阻型混频器 - 放大器级的电路可以包括由具有互补结构的传输门形成的互补混频器。 互补混频器可以被配置为接收一个或多个射频（RF）信号并将一个或多个RF信号转换成中频（IF）电流信号。 互补TIA可以耦合到互补混频器，并且可以被配置为接收IF电流信号并提供IF电压信号。 可以通过将NMOS-TIA和PMOS-TIA耦合到公共负载来形成互补TIA。 互补混频器的第一部分可以耦合到NMOS-TIA，并且互补混频器的第二部分可以耦合到PMOS-TIA。

    ON-CHIP CAPACITOR STRUCTURE
    4.
    发明申请
    ON-CHIP CAPACITOR STRUCTURE 审中-公开
    片上电容结构

    公开(公告)号：US20130270674A1

    公开(公告)日：2013-10-17

    申请号：US13918826

    申请日：2013-06-14

    Applicant: Broadcom Corporation

    Inventor： Hooman DARABI ,  Qiang LI ,  Bo Zhang

    IPC: H01L49/02

    CPC classification number: H01L28/40 ,  H01L23/5223 ,  H01L27/0805 ,  H01L28/87 ,  H01L28/91 ,  H01L29/93 ,  H01L29/94 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: At least a first capacitor is formed on a substrate and connected to a first differential node of a differential circuit, and the first capacitor may be variable in capacitance. A second capacitor is formed on the substrate and connected to a second differential node of the differential circuit, and the second capacitor also may be variable. A third capacitor is connected between the first differential node and the second differential node, and is formed at least partially above the first capacitor. In this way, a size of the first capacitor and/or the second capacitor may be reduced on the substrate, and capacitances of the first and/or second capacitor(s) may be adjusted in response to a variable characteristic of one or more circuit components of the differential circuit.

    Abstract translation: 至少第一电容器形成在衬底上并连接到差分电路的第一差分节点，并且第一电容器可以是可变电容的。 第二电容器形成在衬底上并连接到差分电路的第二差分节点，并且第二电容器也可以是可变的。 第三电容器连接在第一差分节点和第二差分节点之间，并且至少部分地形成在第一电容器的上方。 以这种方式，可以在衬底上减小第一电容器和/或第二电容器的尺寸，并且可以响应于一个或多个电路的可变特性来调整第一和/或第二电容器的电容 差分电路的组件。

    LOW-LOSS ELECTRICAL BALANCE DUPLEXER WITH NOISE CANCELLATION
    5.
    发明申请
    LOW-LOSS ELECTRICAL BALANCE DUPLEXER WITH NOISE CANCELLATION 有权
    具有噪声消除的低电平平衡双工器

    公开(公告)号：US20150171975A1

    公开(公告)日：2015-06-18

    申请号：US14631714

    申请日：2015-02-25

    Applicant: BROADCOM CORPORATION

    Inventor： Mohyee MIKHEMAR ,  Hooman DARABI

    IPC: H04B15/00 ,  H04B1/12 ,  H04L5/14

    CPC classification number: H04B15/00 ,  H04B1/123 ,  H04B1/48 ,  H04B1/525 ,  H04L5/14

    Abstract: A circuit for a low-loss duplexer with noise cancellation in a receive (RX) path of a transceiver includes a duplexer, a balancing network, and a noise cancellation circuit. The duplexer circuit is coupled to an antenna of the transceiver. The balancing network is coupled to the duplexer and provides an impedance matching an impedance associated with the antenna. The noise cancellation circuit senses a noise signal generated by the balancing network and uses the sensed noise signal to improve a signal-to-noise ratio (SNR) of the RX path.

    Abstract translation: 在收发器的接收（RX）路径中具有噪声消除的低损耗双工器的电路包括双工器，平衡网络和噪声消除电路。 双工器电路耦合到收发器的天线。 平衡网络耦合到双工器，并提供与天线相关联的阻抗匹配的阻抗。 噪声消除电路感测由平衡网络产生的噪声信号，并使用所感测的噪声信号来提高RX路径的信噪比（SNR）。

    INTEGRATED CIRCUIT WITH CALIBRATED PULLING EFFECT CORRECTION
    6.
    发明申请
    INTEGRATED CIRCUIT WITH CALIBRATED PULLING EFFECT CORRECTION 审中-公开
    具有校准推挽效应校正的集成电路

    公开(公告)号：US20140191812A1

    公开(公告)日：2014-07-10

    申请号：US13802395

    申请日：2013-03-13

    Applicant: BROADCOM CORPORATION

    Inventor： Ahmad MIRZAEI ,  Hooman DARABI

    IPC: H03L7/085

    CPC classification number: H03L7/099 ,  H03L7/06 ,  H03L7/085 ,  H03L7/101 ,  H03L7/18 ,  H03L2207/14 ,  H04B1/0475 ,  H04B1/525 ,  H04B2001/0491

    Abstract: A frequency-control circuit includes a phase frequency detector configured to receive a reference frequency signal and generate an output detection signal. The phase frequency detector can be configured to detect a difference in phase and frequency between the reference frequency signal and a feedback of the output frequency signal. The frequency-control circuit also includes a current source applied to the output detection signal to form a correction voltage that is a function of a pulling signal having one or more unwanted frequency components. The frequency-control circuit also includes a loop filter configured to filter the output detection signal including the correction voltage and generate a control voltage signal. The frequency-control circuit also includes a voltage-controlled oscillator configured to receive the control voltage signal and generate an output frequency signal.

    Abstract translation: 频率控制电路包括被配置为接收参考频率信号并产生输出检测信号的相位频率检测器。 相位频率检测器可以被配置为检测参考频率信号和输出频率信号的反馈之间的相位和频率的差异。 频率控制电路还包括施加到输出检测信号的电流源，以形成作为具有一个或多个不想要的频率分量的拉动信号的函数的校正电压。 频率控制电路还包括环路滤波器，其被配置为对包括校正电压的输出检测信号进行滤波并产生控制电压信号。 频率控制电路还包括被配置为接收控制电压信号并产生输出频率信号的压控振荡器。

    RECEIVER WITH VARIABLE GAIN CONTROL TRANSIMPEDANCE AMPLIFIER
    8.
    发明申请
    RECEIVER WITH VARIABLE GAIN CONTROL TRANSIMPEDANCE AMPLIFIER 审中-公开
    接收器具有可变增益控制转移放大器

    公开(公告)号：US20150326185A1

    公开(公告)日：2015-11-12

    申请号：US14807429

    申请日：2015-07-23

    Applicant: Broadcom Corporation

    Inventor： Mohyee MIKHEMAR ,  Amir HADJl-ABDOLHAMID ,  Hooman DARABI

    IPC: H03F1/02 ,  H03G1/00 ,  H03F3/19 ,  H03F3/45 ,  H04B1/12 ,  H04B1/16

    CPC classification number: H03H11/1217 ,  H03F1/0205 ,  H03F1/086 ,  H03F3/19 ,  H03F3/45076 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/91 ,  H03F2203/45332 ,  H03F2203/45336 ,  H03G1/0005 ,  H03G1/0029 ,  H03G3/3068 ,  H03G3/32 ,  H03H11/1252 ,  H03H11/1256 ,  H03H11/1291 ,  H03H2210/025 ,  H04B1/123 ,  H04B1/16 ,  H04L25/06

    Abstract: According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TIA) implemented using a current mode buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.

    Abstract translation: 根据一个实施例，紧凑型低功率接收机包括由数字控制接口电路连接的第一和第二模拟电路。 第一模拟电路在输出处具有第一直流（DC）偏移和第一共模电压，并且第二模拟电路在输入端具有第二直流偏移和第二共模电压。 数字控制接口电路将输出连接到输入，并且被配置为匹配第一和第二DC偏移并且匹配第一和第二共模电压。 在一个实施例中，第一模拟电路是使用电流模式缓冲器实现的可变增益控制跨阻抗放大器（TIA），第二模拟电路是二阶可调低通滤波器，由此三极可调低通滤波器 在紧凑型低功率接收机中有效生产。

    INTEGRATED CIRCUIT WITH CALIBRATED PULLING EFFECT CORRECTION
    9.
    发明申请
    INTEGRATED CIRCUIT WITH CALIBRATED PULLING EFFECT CORRECTION 审中-公开
    具有校准推挽效应校正的集成电路

    公开(公告)号：US20140191811A1

    公开(公告)日：2014-07-10

    申请号：US13802422

    申请日：2013-03-13

    Applicant: BROADCOM CORPORATION

    Inventor： Ahmad MIRZAEI ,  Hooman DARABI

    IPC: H03L5/00

    CPC classification number: H03L7/099 ,  H03L7/06 ,  H03L7/085 ,  H03L7/101 ,  H03L7/18 ,  H03L2207/14 ,  H04B1/0475 ,  H04B1/525 ,  H04B2001/0491

    Abstract: A calibration circuit includes a combinational gate configured to receive a voltage-controlled oscillator (VCO) output signal and a selected reference signal to detect a phase difference between the VCO output signal and the selected reference signal and generate an output binary signal, in which the VCO output signal has one or more unwanted frequency components. The calibration circuit also includes a loop filter configured to filter the output binary signal and generate a filtered calibration signal. The calibration circuit also includes an analog-to-digital converter configured to convert the filtered calibration signal from the analog domain to the digital domain and generate a converted calibration signal. The calibration circuit also includes a processor configured to compute the converted calibration signal and determine components of a baseband signal that cancels the one or more unwanted frequency components of the VCO output signal.

    Abstract translation: 校准电路包括组合门，其被配置为接收压控振荡器（VCO）输出信号和选择的参考信号，以检测VCO输出信号和所选参考信号之间的相位差，并产生输出二进制信号，其中 VCO输出信号具有一个或多个不需要的频率分量。 校准电路还包括环路滤波器，其被配置为对输出的二进制信号进行滤波并产生滤波的校准信号。 校准电路还包括模数转换器，其被配置为将滤波的校准信号从模拟域转换为数字域并产生转换的校准信号。 校准电路还包括被配置为计算转换的校准信号并确定消除VCO输出信号的一个或多个不想要的频率分量的基带信号的分量的处理器。

    LOW-LOSS TX-TO-RX ISOLATION USING ELECTRICAL BALANCE DUPLEXER WITH NOISE CANCELLATION
    10.
    发明申请
    LOW-LOSS TX-TO-RX ISOLATION USING ELECTRICAL BALANCE DUPLEXER WITH NOISE CANCELLATION 有权
    低噪声TX-TO-RX隔离，使用电平衡双工器与噪声消除

    公开(公告)号：US20140169231A1

    公开(公告)日：2014-06-19

    申请号：US13719055

    申请日：2012-12-18

    Applicant: BROADCOM CORPORATION

    Inventor： Mohyee MIKHEMAR ,  Hooman DARABI

    IPC: H04L5/14

    CPC classification number: H04B15/00 ,  H04B1/123 ,  H04B1/48 ,  H04B1/525 ,  H04L5/14

    Abstract: A circuit for a low-loss electrical balance duplexer (EBD) with noise cancellation may include an EBD circuit. The EBD circuit may be coupled to one or more output nodes of a transmit (TX) path, an antenna, and a one or more input nodes of a receive (RX) path. The EBD circuit may be configured to isolate the TX path from the RX path, and to provide low-loss signal paths between the one or more output nodes of the TX path and the antenna. A balancing network may be coupled to the EBD circuit and configured to provide an impedance that matches an impedance associated with the antenna. A noise cancellation circuit may be configured to sense a noise signal generated by the balancing network, and to use the sensed noise signal to improve a signal-to-noise ratio (SNR) of the RX path.

    Abstract translation: 用于具有噪声消除的低损耗电气平衡双工器（EBD）的电路可以包括EBD电路。 EBD电路可以耦合到发射（TX）路径，天线和接收（RX）路径的一个或多个输入节点的一个或多个输出节点。 EBD电路可以被配置为将TX路径与RX路径隔离，并且在TX路径的一个或多个输出节点和天线之间提供低损耗信号路径。 平衡网络可以耦合到EBD电路并且被配置为提供匹配与天线相关联的阻抗的阻抗。 噪声消除电路可以被配置为感测由平衡网络产生的噪声信号，并且使用所感测的噪声信号来提高RX路径的信噪比（SNR）。

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