公开(公告)号：US12183818B2

公开(公告)日：2024-12-31

申请号：US17417677

申请日：2019-12-23

Applicant: SOUTHEAST UNIVERSITY ,  CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Weifeng Sun ,  Rongcheng Lou ,  Kui Xiao ,  Feng Lin ,  Jiaxing Wei ,  Sheng Li ,  Siyang Liu ,  Shengli Lu ,  Longxing Shi

IPC: H01L29/78 ,  H01L21/04 ,  H01L29/10 ,  H01L29/16 ,  H01L29/66

Abstract: A power semiconductor device includes: a substrate; drain metal; a drift region; a base region; a gate structure; a first conductive type doped region contacting the base region on the side of the base region distant from the gate structure; a source region provided in the base region and between the first conductive type doped region and the gate structure; contact metal that is provided on the first conductive type doped region and forms a contact barrier having rectifying characteristics together with the first conductive type doped region below; and source metal wrapping the contact metal and contacting the source region.

公开(公告)号：US10290705B2

公开(公告)日：2019-05-14

申请号：US15564181

申请日：2016-01-29

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Feng Huang ,  Guangtao Han ,  Guipeng Sun ,  Feng Lin ,  Longjie Zhao ,  Huatang Lin ,  Bing Zhao

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/76 ,  H01L29/06 ,  H01L21/762

Abstract: Provided are a laterally diffused metal oxide semiconductor field-effect transistor and a manufacturing method therefor. The method comprises: providing a wafer on which a first N well (22), a first P well (24) and a channel region shallow trench isolating structure (42) are formed; forming a high-temperature oxidation film on the surface of the wafer by deposition; photoetching and dryly etching the high-temperature oxidation film, and reserving a thin layer as an etching buffer layer; performing wet etching, removing the etching buffer layer in a region which is not covered by a photoresist, and forming a mini oxidation layer (52); performing photoetching and ion injection to form a second N well (32) in the first N well and form a second P well (34) in the first P well; forming a polysilicon gate (62) and a gate oxide layer on the surface of the wafer; and photoetching and injecting N-type ions to form a drain electrode (72) and a source electrode (74).

公开(公告)号：US11201557B2

公开(公告)日：2021-12-14

申请号：US16959116

申请日：2018-12-29

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD. ,  SOUTHEAST UNIVERSITY

Inventor： Qinsong Qian ,  Shengyou Xu ,  Feng Lin ,  Hao Wang ,  Wei Su ,  Qi Liu ,  Longxing Shi

IPC: H02M3/335 ,  H02M1/00 ,  H02M3/00

Abstract: A control system for synchronous rectifying transistor of LLC converter, the system comprising a voltage sampling circuit, a high-pass filtering circuit, a PI compensation and effective value detection circuit, and a control system taking a microcontroller (MCU) as a core. When the LLC converter is operating at a high frequency, a drain-source voltage VDS(SR) of the synchronous rectifying transistor delivers, via the sampling circuit, a change signal of the drain-source voltage during turn-off into the high-pass filtering circuit and the PI compensation and effective value detection circuit to obtain an effective value amplification signal of a drain-source voltage oscillation signal caused by parasitic parameters, and the current value is compared with a previously collected value via a control circuit taking a microcontroller (MCU) as a core, so as to change a turning-on time of the synchronous rectifying transistor in the next period.