公开(公告)号：US20200343845A1

公开(公告)日：2020-10-29

申请号：US16958868

申请日：2018-12-29

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD. ,  SOUTHEAST UNIVERSITY

Inventor： Rui ZHONG ,  Mingshu ZHANG ,  Sen ZHANG ,  Jinyu XIAO ,  Wei SU ,  Weifeng SUN ,  Longxing SHI

IPC: H02P25/08 ,  H02P23/04

Abstract: A method and an apparatus for reducing noise of a switched reluctance motor, includes: supplying a PWM signal as a driving signal to a driving circuit of a switched reluctance motor; and varying a carrier frequency of the PWM signal as an operation period of the switched reluctance motor varies; if the switched reluctance motor changes phase, determining that the operation period of the switched reluctance motor varies.

公开(公告)号：US20200336076A1

公开(公告)日：2020-10-22

申请号：US16959116

申请日：2018-12-29

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD. ,  SOUTHEAST UNIVERSITY

Inventor： Qinsong QIAN ,  Shengyou XU ,  Feng LIN ,  Hao WANG ,  Wei SU ,  Qi LIU ,  Longxing SHI

IPC: H02M3/335

Abstract: A control system for synchronous rectifying transistor of LLC converter, the system comprising a voltage sampling circuit, a high-pass filtering circuit, a PI compensation and effective value detection circuit, and a control system taking a microcontroller (MCU) as a core. When the LLC converter is operating at a high frequency, a drain-source voltage VDS(SR) of the synchronous rectifying transistor delivers, via the sampling circuit, a change signal of the drain-source voltage during turn-off into the high-pass filtering circuit and the PI compensation and effective value detection circuit to obtain an effective value amplification signal of a drain-source voltage oscillation signal caused by parasitic parameters, and the current value is compared with a previously collected value via a control circuit taking a microcontroller (MCU) as a core, so as to change a turning-on time of the synchronous rectifying transistor in the next period.

公开(公告)号：US20200343810A1

公开(公告)日：2020-10-29

申请号：US16959015

申请日：2018-12-29

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD. ,  SOUTHEAST UNIVERSITY

Inventor： Shen XU ,  Minggang CHEN ,  Hao WANG ,  Jinyu XIAO ,  Wei SU ,  Weifeng SUN ,  Longxing SHI

IPC: H02M1/38 ,  H02M3/335 ,  H02M1/08

Abstract: An automatic dead zone time optimization system in a primary-side regulation flyback power supply CCM mode, comprising a closed loop formed by a control system, consisting of a single output DAC midpoint sampling module, a digital control module, a current detection module, a dead zone time calculation module and a PWM driving module, and a controlled synchronous rectification primary-side regulation flyback converter. By means of a DAC Sampling mechanism, a primary-side current is sampled to calculate a secondary-side average current, so as to obtain a primary-side average current Imid_p and a secondary-side average current Is(tmid) in the case of CCM; a secondary-side current is input into the dead zone time calculation module to obtain a reasonable dead zone time td; and finally, the PWM driving module is jointly controlled by a primary-side regulation loop and the obtained dead zone time td.

公开(公告)号：US20200336070A1

公开(公告)日：2020-10-22

申请号：US16959001

申请日：2018-12-29

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD. ,  SOUTHEAST UNIVERSITY

Inventor： Weifeng SUN ,  Rongrong TAO ,  Hao WANG ,  Jinyu XIAO ,  Wei SU ,  Shen XU ,  Longxing SHI

IPC: H02M3/335 ,  H03K5/24

Abstract: A method for improving the conversion efficiency of a CCM mode of a flyback resonant switch power supply, comprising: presetting a threshold value Tset, calculating a time interval Ttap between adjacent zero points during a present conducting time, outputting a switch-off signal at zero points, and comparing the time interval Ttap with the preset threshold value Tset; when Ttap>Tset, he present switch-off time to be less than a switch-off time of a previous cycle, outputting a switch-on signal; when Ttap=0, controlling the present switch-off time to be greater than a switch-off time of the previous cycle, outputting a switch-on signal; and when 0

公开(公告)号：US20200328689A1

公开(公告)日：2020-10-15

申请号：US16915524

申请日：2020-06-29

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD. ,  SOUTHEAST UNIVERSITY

Inventor： Shen XU ,  Wei WANG ,  Feng LIN ,  Boyong HE ,  Wei SU ,  Weifeng SUN ,  Longxing SHI

IPC: H02M3/335 ,  G01R19/165 ,  H03K5/24

Abstract: Provided is a dynamic control method that turns off a primary-side switching transistor when an output voltage exceeds an upper limit, and control the switching of a secondary-side synchronous rectification transistor with a fixed cycle and a fixed duty cycle. During the time that the synchronous rectification transistor is turned on, the energy of a load capacitor at the output end is extracted to the primary side, which causes the output voltage to drop rapidly and the overshoot voltage to decrease greatly.

公开(公告)号：US20180012980A1

公开(公告)日：2018-01-11

申请号：US15548290

申请日：2016-01-28

Applicant: CSMC TECHNOLOGIES FAB2 CO., LTD.

Inventor： Yan GU ,  Wei SU ,  Sen ZHANG

IPC: H01L29/739 ,  H01L29/423 ,  H01L29/10

CPC classification number: H01L29/7394 ,  H01L29/1037 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4236 ,  H01L29/735

Abstract: A lateral insulated gate bipolar transistor, comprising: a substrate (100), having a first conductivity type; an insulating layer (200), formed on the substrate (100); an epitaxial layer (300), having a second conductivity type and formed on the insulating layer (200); a field oxide layer (400), formed on the epitaxial layer (300); a first well (500), having the first conductivity type; a plurality of gate trench structures (600); second source doped regions (720), having the second conductivity type; first source doped regions (710), having the first conductivity type; a second well (800), having the second conductivity type; a first drain doped region (910), having the first conductivity type and formed on a surface layer of the second well (800); gate lead-out ends (10); a source lead-out end (20); a drain lead-out end (30).