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公开(公告)号：US20220308613A1
公开(公告)日：2022-09-29
申请号：US17212124
申请日：2021-03-25
Inventor： Ramin Zanbaghi , Eric Kimball
Abstract: Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.
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公开(公告)号：US11296663B2
公开(公告)日：2022-04-05
申请号：US16864893
申请日：2020-05-01
Inventor： Ramin Zanbaghi , Cory J. Peterson , Anand Ilango , Eric Kimball
Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.
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公开(公告)号：US12143078B2
公开(公告)日：2024-11-12
申请号：US17331525
申请日：2021-05-26
Inventor： Edmund M. Schneider , Ramin Zanbaghi , Terence C. Bowness , Eric Kimball
Abstract: A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M different combinations, to connect N/2 of the N CEs to form a first composite CE and to connect a remaining N/2 of the N CEs to form a second composite CE. Sequentially in time, for each combination of the M combinations, the switches are configured to form the first and second composite CEs according to the combination and a characteristic of the circuit is measured that includes the formed first and second composite CEs. The characteristic indicates how well the formed composite CEs match. A final combination of the M combinations is chosen whose measured characteristic indicates a best match and the final combination is used to configure the switches to form the composite CEs.
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公开(公告)号：US20230308060A1
公开(公告)日：2023-09-28
申请号：US18204356
申请日：2023-05-31
Inventor： John L. Melanson , Cory J. Peterson , Chandra Prakash , Ramin Zanbaghi , Eric Kimball
CPC classification number: H03F3/2178 , H03F1/26 , H03F3/187 , H03F2200/03
Abstract: Amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include multiple driver circuits and a control circuit. The control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits, according to an input signal to be reproduced by one or more of the multiple amplifier driver circuits. The control circuit determines a splice point at which the control circuit selects between actively operating selected ones of the multiple driver circuits or all of the multiple driver circuits.
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公开(公告)号：US11722107B2
公开(公告)日：2023-08-08
申请号：US17589047
申请日：2022-01-31
Inventor： John L. Melanson , Cory J. Peterson , Chandra Prakash , Ramin Zanbaghi , Eric Kimball
CPC classification number: H03F3/2178 , H03F1/26 , H03F3/187 , H03F2200/03
Abstract: Class-D amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include a first H-bridge driver circuit and a second H-bridge driver circuit. The class-D amplifier circuits also include a control circuit having an input for receiving an input signal to be reproduced by the class-D amplifier circuit. The control circuit has outputs coupled to inputs of the first and second H-bridge drivers, and includes one or more modulators. The control circuit selects between actively operating a selected one of the driver circuits or both, according to the signal to be reproduced, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.
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Patent Agency Ranking
6.发明授权公开(公告)号：US11290070B2
公开(公告)日：2022-03-29
申请号：US16869226
申请日：2020-05-07
Inventor： Ramin Zanbaghi , Cory J. Peterson , Eric Kimball
Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.
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公开(公告)号：US11190148B2
公开(公告)日：2021-11-30
申请号：US16732993
申请日：2020-01-02
Inventor： Eric Kimball , Chandra Prakash , Ramin Zanbaghi , Cory J. Peterson
Abstract: A system may include a forward signal path having a forward gain and configured to receive an input signal at an input and generate an output signal at an output as a function of the input signal, a feedback signal path having a feedback gain and coupled between the output and the input, and a control subsystem configured to operate the forward signal path and the feedback signal path in at least two modes comprising a first mode in which the forward gain is a first forward gain and the feedback gain is a first feedback gain and a second mode in which the forward gain is a second forward gain smaller than the first forward gain and the feedback gain is a second feedback gain larger than the first feedback gain. The control subsystem may cause operation in the first mode when signal content is present in the input signal and may cause operation in the second mode when signal content is absent from the input signal.
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公开(公告)号：US11644493B2
公开(公告)日：2023-05-09
申请号：US17668445
申请日：2022-02-10
Inventor： Saurabh Singh , Chandra B. Prakash , Eric Kimball , Cory J. Peterson , Ryan Lobo
CPC classification number: G01R27/08 , G01R17/105 , G01R27/02 , G01R19/0084 , G01R19/0092
Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.
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公开(公告)号：US11012043B2
公开(公告)日：2021-05-18
申请号：US16544815
申请日：2019-08-19
Inventor： Ramin Zanbaghi , Eric Kimball , Sai Srujana Vuppala
IPC: H03F3/45
Abstract: A system has an output and receives an input signal. An operational amplifier has an input, an output and an offset at the input. A switched capacitor network samples the input signal at a switched capacitor frequency. An autozeroing capacitor connected to the input of the operational amplifier captures the offset during an offset capture interval according to an autozeroing frequency. Chopping and autozeroing switches, connected between the autozeroing capacitor and the switched capacitor network, chop the sampled input signal according to a chopping frequency and autozero the captured offset according to the autozeroing frequency. De-chopping switches, connected between the output of the operational amplifier and the output of the system, operate on the output of the operational amplifier at the chopping frequency to chop the autozeroed captured offset and de-chop the chopped sampled input signal processed by the operational amplifier.
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公开(公告)号：US10690730B2
公开(公告)日：2020-06-23
申请号：US16003078
申请日：2018-06-07
Inventor： Eric Kimball
Abstract: Switching circuits controllable to force an input into a circuit and to sense a responsively produced output in multiple ways to produce different combinations of positive and negative polarities of a desired signal and of sources of offsets and 1/f noise. The switching circuits are controlled in a non-ordered time sequence of different combinations of positive and negative polarities of the sources of the offsets and 1/f noise that spreads their energy to a frequency range above the desired signal frequency band. The non-ordered time sequence leaves the polarity of the desired signal unchanged. Uncorrelated delta-sigma modulators may generate the control signal. A DSP processes a resulting spectrum of a digital domain version of the sensed output to measure residual offsets and 1/f noise and adds to an input present at the DSMs a signal equal in magnitude and opposite in sign to the measured residual offsets and 1/f noise.
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