中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

10 records (took 0.012 seconds)

    Winding arrangement for inductive components and method for manufacturing a winding arrangement for inductive components
    1.
    发明授权
    Winding arrangement for inductive components and method for manufacturing a winding arrangement for inductive components 有权

    公开(公告)号：US10424434B2

    公开(公告)日：2019-09-24

    申请号：US14647066

    申请日：2012-11-26

    Applicant: Franc Zajc

    Inventor： Franc Zajc

    IPC: H01F27/28 ,  H01F27/24 ,  H01F27/29 ,  H01F41/063 ,  H01F41/064

    Abstract: A winding arrangement for inductive components includes a first winding section comprising at least one first winding, the at least one first winding comprising at least two electrically isolated parallel flat band conductors being configured as a first flat band stack, a second winding section comprising at least one second winding, the at least one second winding comprising at least two electrically isolated parallel flat band conductors being configured as a second flat band stack. The first ends of the flat band conductors of the first winding section are cross connected in a cross connection to first ends of the flat band conductors of the second winding section such that a first current flow stacking sequence in the first flat band stack is reversed to a second current flow stacking sequence in the second flat band stack.

    METHOD AND APPARATUS FOR DRIVING A VOLTAGE CONTROLLED POWER SWITCH DEVICE
    4.
    发明申请
    METHOD AND APPARATUS FOR DRIVING A VOLTAGE CONTROLLED POWER SWITCH DEVICE 有权
    用于驱动电压控制电源开关装置的方法和装置

    公开(公告)号：US20130181748A1

    公开(公告)日：2013-07-18

    申请号：US13351618

    申请日：2012-01-17

    Applicant: Franc Zajc

    Inventor： Franc Zajc

    IPC: H03K3/00

    CPC classification number: H03K4/625 ,  H03K4/64 ,  H03K4/90 ,  H03K17/302 ,  H03K17/691 ,  H03K19/017

    Abstract: A driving circuit for at least one voltage controlled power switch device comprises a driver signal generating circuit and a trigger signal generating circuit adapted to generate trigger signals for said voltage controlled power switch device (PT). The trigger signal generating circuit includes a first driving transistor, and at least one energy buffer component coupled between the trigger signal generating circuit and the control electrode of said power switch device (PT).

    Abstract translation: 用于至少一个压控功率开关装置的驱动电路包括驱动器信号发生电路和触发信号发生电路，适于产生用于所述压控功率开关装置（PT）的触发信号。 触发信号发生电路包括第一驱动晶体管和耦合在触发信号发生电路和所述电源开关装置（PT）的控制电极之间的至少一个能量缓冲器组件。

    Method and apparatus for driving half bridge connected semiconductor power switches with a stable and extremely short interlock delay combined with a switching transition speed increase and a driving power consumption reduction
    5.
    发明授权
    Method and apparatus for driving half bridge connected semiconductor power switches with a stable and extremely short interlock delay combined with a switching transition speed increase and a driving power consumption reduction 有权
    用于驱动半桥连接的半导体功率开关的方法和装置，具有稳定和极短的互锁延迟，结合开关转变速度增加和驱动功率消耗降低

    公开(公告)号：US09496857B2

    公开(公告)日：2016-11-15

    申请号：US14372720

    申请日：2013-01-17

    Applicant: Franc Zajc

    Inventor： Franc Zajc

    IPC: H03K5/13 ,  H03K4/62 ,  H03K17/30 ,  H03K19/017 ,  H03K4/64 ,  H03K4/90 ,  H03K17/691

    CPC classification number: H03K4/625 ,  H03K4/64 ,  H03K4/90 ,  H03K17/302 ,  H03K17/691 ,  H03K19/017

    Abstract: A driving circuit for driving half bridge connected electrically controlled power switches with a near zero interlock delay time between on-states of the power switches, wherein the driving circuit is configured to receive an input signal and to generate: —a first drive signal being adapted to switch a first power switch between the on and off state, —a second drive signal being adapted to switch a second power switch between the on and off state, wherein the signal curve of the first drive signal generated in response to a rising and falling edge of said input signal is mirrored with respect to the signal curve of the second drive signal along a time axis of a mirroring voltage value within a transition time, wherein the mirroring voltage value is adjusted such to be within the cutoff region of the power switches.

    Abstract translation: 一种驱动电路，用于驱动半桥连接的电力控制功率开关，其中电源开关的导通状态之间具有接近零的互锁延迟时间，其中驱动电路被配置为接收输入信号并产生： - 第一驱动信号被适配 在开和关状态之间切换第一电源开关， - 第二驱动信号适于在导通和断开状态之间切换第二电源开关，其中响应于上升和下降而产生的第一驱动信号的信号曲线 所述输入信号的边缘相对于沿着转换时间内的镜像电压值的时间轴的第二驱动信号的信号曲线被镜像，其中镜像电压值被调整为在功率开关的截止区域内 。

    METHOD AND APPARATUS FOR DRIVING HALF BRIDGE CONNECTED SEMICONDUCTOR POWER SWITCHES WITH A STABLE AND EXTREMELY SHORT INTERLOCK DELAY COMBINED WITH A SWITCHING TRANSITION SPEED INCREASE AND A DRIVING POWER CONSUMPTION REDUCTION
    6.
    发明申请
    METHOD AND APPARATUS FOR DRIVING HALF BRIDGE CONNECTED SEMICONDUCTOR POWER SWITCHES WITH A STABLE AND EXTREMELY SHORT INTERLOCK DELAY COMBINED WITH A SWITCHING TRANSITION SPEED INCREASE AND A DRIVING POWER CONSUMPTION REDUCTION 审中-公开
    用于驱动半桥连接的半导体电源开关的方法和装置，具有与切换转换速度增加和驱动功耗减少相结合的稳定且极为短暂的互锁延迟

    公开(公告)号：US20150109033A1

    公开(公告)日：2015-04-23

    申请号：US14372720

    申请日：2013-01-17

    Applicant: Franc ZAJC

    Inventor： Franc Zajc

    IPC: H03K4/62 ,  H03K4/90 ,  H03K4/64

    CPC classification number: H03K4/625 ,  H03K4/64 ,  H03K4/90 ,  H03K17/302 ,  H03K17/691 ,  H03K19/017

    Abstract: A driving circuit for driving half bridge connected electrically controlled power switches with a near zero interlock delay time between on-states of the power switches, wherein the driving circuit is configured to receive an input signal and to generate: —a first drive signal being adapted to switch a first power switch between the on and off state, —a second drive signal being adapted to switch a second power switch between the on and off state, wherein the signal curve of the first drive signal generated in response to a rising and falling edge of said input signal is mirrored with respect to the signal curve of the second drive signal along a time axis of a mirroring voltage value within a transition time, wherein the mirroring voltage value is adjusted such to be within the cutoff region of the power switches.

    Abstract translation: 一种驱动电路，用于驱动半桥连接的电力控制功率开关，其中电源开关的导通状态之间具有接近零的互锁延迟时间，其中驱动电路被配置为接收输入信号并产生： - 第一驱动信号被适配 在开和关状态之间切换第一电源开关， - 第二驱动信号适于在导通和断开状态之间切换第二电源开关，其中响应于上升和下降而产生的第一驱动信号的信号曲线 所述输入信号的边缘相对于沿着转换时间内的镜像电压值的时间轴的第二驱动信号的信号曲线被镜像，其中镜像电压值被调整为在功率开关的截止区域内 。

    Winding Arrangement for Inductive Components and Method for Manufacturing a Winding Arrangement for Inductive Components
    7.
    发明申请
    Winding Arrangement for Inductive Components and Method for Manufacturing a Winding Arrangement for Inductive Components 有权
    电感元件绕组布置及电感元件绕组布置方法

    公开(公告)号：US20150325361A1

    公开(公告)日：2015-11-12

    申请号：US14647066

    申请日：2012-11-26

    Applicant: Franc Zajc

    Inventor： Franc Zajc

    IPC: H01F27/28 ,  H01F27/29 ,  H01F41/06 ,  H01F27/24

    Abstract: A winding arrangement for inductive components includes a first winding section comprising at least one first winding, the at least one first winding comprising at least two electrically isolated parallel flat band conductors being configured as a first flat band stack, a second winding section comprising at least one second winding, the at least one second winding comprising at least two electrically isolated parallel flat band conductors being configured as a second flat band stack. The first ends of the flat band conductors of the first winding section are cross connected in a cross connection to first ends of the flat band conductors of the second winding section such that a first current flow stacking sequence in the first flat band stack is reversed to a second current flow stacking sequence in the second flat band stack.

    Abstract translation: 用于感应部件的绕组装置包括包括至少一个第一绕组的第一绕组部分，所述至少一个第一绕组包括构造为第一平带叠层的至少两个电隔离平行平带导体，第二绕组部分至少包括 一个第二绕组，所述至少一个第二绕组包括被配置为第二平带叠层的至少两个电隔离的平行平带导体。 第一绕组部分的扁平带状导体的第一端与第二绕组部分的扁平带状导体的第一端交叉连接，使得第一扁平带堆叠中的第一电流流动堆叠序列被反向到 第二平坦带堆叠中的第二电流流堆叠序列。

    Method and apparatus for driving a voltage controlled power switch device
    8.
    发明授权
    Method and apparatus for driving a voltage controlled power switch device 有权
    用于驱动电压控制电力开关装置的方法和装置

    公开(公告)号：US08829949B2

    公开(公告)日：2014-09-09

    申请号：US13351618

    申请日：2012-01-17

    Applicant: Franc Zajc

    Inventor： Franc Zajc

    IPC: H03K3/00

    CPC classification number: H03K4/625 ,  H03K4/64 ,  H03K4/90 ,  H03K17/302 ,  H03K17/691 ,  H03K19/017

    Abstract: A driving circuit for at least one voltage controlled power switch device comprises a driver signal generating circuit and a trigger signal generating circuit adapted to generate trigger signals for said voltage controlled power switch device (PT). The trigger signal generating circuit includes a first driving transistor, and at least one energy buffer component coupled between the trigger signal generating circuit and the control electrode of said power switch device (PT).

    Abstract translation: 用于至少一个压控功率开关装置的驱动电路包括驱动器信号发生电路和触发信号发生电路，适于产生用于所述压控功率开关装置（PT）的触发信号。 触发信号发生电路包括第一驱动晶体管和耦合在触发信号发生电路和所述电源开关装置（PT）的控制电极之间的至少一个能量缓冲器组件。

    FLAT BAND WINDING FOR AN INDUCTOR CORE
    9.
    发明申请
    FLAT BAND WINDING FOR AN INDUCTOR CORE 审中-公开
    用于电感核心的平带绕组

    公开(公告)号：US20120299681A1

    公开(公告)日：2012-11-29

    申请号：US13524154

    申请日：2012-06-15

    Applicant: Franc Zajc

    Inventor： Franc Zajc

    IPC: H01F27/32

    CPC classification number: H01F7/06 ,  G11B5/17 ,  H01F7/127 ,  H01F27/245 ,  H01F27/25 ,  H01F27/26 ,  H01F27/263 ,  H01F27/2828 ,  H01F27/2847 ,  H01F2027/2861 ,  H01J3/08 ,  H01J3/14 ,  H02K15/024 ,  H02K15/03 ,  Y10T29/4902 ,  Y10T29/49075 ,  Y10T29/49078 ,  Y10T29/49126

    Abstract: The invention provides a flat band winding for an inductor core comprising at least one insulated conductive flat band having a first linear region, a second linear region, and a third linear region, wherein the third linear region is substantially orthogonally connected to said first linear region and to said second linear region such that said first linear region and said second linear region are displaced by a distance and run in parallel or anti-parallel, and wherein said first linear region and said second linear region are wound in opposite directions around the inductor core and around said third region.

    Abstract translation: 本发明提供了一种用于电感器芯的扁平带绕组，包括至少一个具有第一线性区域，第二线性区域和第三线性区域的绝缘导电扁平带，其中第三线性区域基本上正交地连接到所述第一线性区域 以及所述第二线性区域，使得所述第一线性区域和所述第二线性区域偏移一段距离并且平行或反向平行，并且其中所述第一线性区域和所述第二线性区域围绕电感器绕相反方向缠绕 核心和周围的第三个地区。

    MULTI GAP INDUCTOR CORE, MULTI GAP INDUCTOR, TRANSFORMER AND CORRESPONDING MANUFACTURING METHOD AND WINDING
    10.
    发明申请
    MULTI GAP INDUCTOR CORE, MULTI GAP INDUCTOR, TRANSFORMER AND CORRESPONDING MANUFACTURING METHOD AND WINDING 审中-公开
    多孔隙电感核，多孔电感，变压器及相应的制造方法及绕组

    公开(公告)号：US20120299680A1

    公开(公告)日：2012-11-29

    申请号：US13116699

    申请日：2011-05-26

    Applicant: Franc Zajc

    Inventor： Franc Zajc

    IPC: H01F27/245 ,  H01F7/06 ,  H01F27/28

    CPC classification number: H01F7/06 ,  G11B5/17 ,  H01F7/127 ,  H01F27/245 ,  H01F27/25 ,  H01F27/26 ,  H01F27/263 ,  H01F27/2828 ,  H01F27/2847 ,  H01F2027/2861 ,  H01J3/08 ,  H01J3/14 ,  H02K15/024 ,  H02K15/03 ,  Y10T29/4902 ,  Y10T29/49075 ,  Y10T29/49078 ,  Y10T29/49126

    Abstract: The invention provides a multi gap inductor core, a multi gap inductor, transformer, and a corresponding manufacturing method and winding. The multi gap inductor core (1; 1′; 1″; 1′″), comprises a first plurality of magnetic lamination sheets (2a-2g; 2a′-2m′; 2a″-2n″) made of magnetic core material arranged in a stack and a second plurality of fixing layers (3a-3f; 3a′-3l′; 3a″-3l″) made of a fixing material. Each fixing layer (3a-3f; 3a′-3l′; 3a″-3l″) is arranged between a corresponding pair of adjacent magnetic lamination sheets (2a-2g; 2a′-2m′; 2a″-2n″) and includes mechanical spacer means (4; 4′) which define a gap (G) having a predetermined thickness (d2) between a corresponding pair of adjacent magnetic lamination sheets (2a-2g; 2a′-2m′; 2a″-2n″).

    Abstract translation: 本发明提供了多间隙电感器芯，多间隙电感器，变压器及相应的制造方法和绕组。 多间隙电感器芯（1; 1“; 1”; 1“”）包括由磁芯材料制成的第一多个磁性层压片（2a-2g; 2a'-2m'; 2a“-2n”） 在由固定材料制成的堆叠和第二多个固定层（3a-3f; 3a'-31'; 3a“-31”）中。 每个固定层（3a-3f; 3a'-31'; 3a“-31”）布置在相应的一对相邻的磁性层压片（2a-2g; 2a'-2m'; 2a“-2n”）之间，并且包括 在相应的一对相邻的磁性层叠片（2a-2g; 2a'-2m'; 2a“-2n”）之间限定具有预定厚度（d2）的间隙（G）的机械间隔装置（4; 4'）。

Patent Agency Ranking