公开(公告)号：US06703844B2

公开(公告)日：2004-03-09

申请号：US10223899

申请日：2002-08-20

申请人： Frank Adler ,  Thomas Huber ,  Manfred Moser ,  Martin Versen

发明人： Frank Adler ,  Thomas Huber ,  Manfred Moser ,  Martin Versen

IPC分类号： G01R3128

CPC分类号： G11C29/025 ,  G01R31/2801 ,  G01R31/3016 ,  G11C29/02 ,  G11C29/50 ,  G11C29/50012 ,  G11C2029/5002

摘要： Signal transit times on printed circuit boards which are equipped with all the passive components but without any active components can be determined using automatic standard test equipment composed of a standard test unit and a performance board with fittings attached thereto. In that first, using a standard routine of the test unit, a transit time is measured on the performance board from the CIF connector as far as the fitting, then a printed circuit board is plugged into the fitting location determined for it and then the sum transit time of the CIF connector is measured as far as the landing pad on the printed circuit board. By forming differences between the two measured values, the transit times on a printed circuit board can be measured with a high degree of precision with the automatic standard test equipment used in standard module testing technology.

摘要翻译： 配备有所有被动部件但没有任何有源部件的印刷电路板上的信号传递时间可以使用由标准测试单元和附接到其上的配件的性能板组成的自动标准测试设备来确定。 首先，使用测试单元的标准程序，在CIF连接器的性能板上测量运输时间至配件，然后将印刷电路板插入到为其确定的配件位置，然后总和 CIF连接器的通行时间被测量到印刷电路板上的着陆焊盘。 通过形成两个测量值之间的差异，可以使用标准模块测试技术中使用的自动标准测试设备，以高精度测量印刷电路板上的传送时间。

公开(公告)号：US06836440B2

公开(公告)日：2004-12-28

申请号：US10356921

申请日：2003-01-30

申请人： Frank Adler ,  Thomas Huber ,  Manfred Moser

发明人： Frank Adler ,  Thomas Huber ,  Manfred Moser

IPC分类号： G11C2900

CPC分类号： G11C29/025 ,  G11C29/02 ,  G11C2207/105

摘要： Two methods check functional capability of electrical connections between address lines of a printed circuit board of a memory module and address line contacts of an integrated semiconductor memory chip mounted on the printed circuit board. Ruptured solder contacts are conventionally examined optically or investigated by electrical resistance measurements; however, the latter do not work in the case of memory modules with a number of semiconductor chips, the pin contacts of which are connected in parallel by the address lines. The methods make it possible to locate interrupted contacts on individual address lines by the indirect use of a write-read access to the semiconductor memory chip, specifically utilizing the misrouting of writing and reading commands produced by defective contact connections.

摘要翻译： 两种方法检查存储器模块的印刷电路板的地址线和安装在印刷电路板上的集成半导体存储器芯片的地址线触点之间的电连接的功能性。 通常通过电阻测量光学地检查破裂的焊料接触点; 然而，后者在具有多个半导体芯片的存储器模块的情况下不起作用，其引脚触点由地址线并联连接。 这些方法可以通过间接使用对半导体存储器芯片的写入访问来定位各个地址线上的中断的触点，特别是利用写入和读取由缺陷接触连接产生的命令的错误路由。

公开(公告)号：US08693205B2

公开(公告)日：2014-04-08

申请号：US13002367

申请日：2009-05-04

申请人： Manfred Moser ,  Mark Wonner ,  Roland Cupal

发明人： Manfred Moser ,  Mark Wonner ,  Roland Cupal

IPC分类号： H05K5/00

CPC分类号： H05K5/0069 ,  B60R16/0239 ,  H05K5/0078

摘要： A control unit is provided and a method for assembling such a control unit for a personal protection device for a vehicle. A circuit board is installed between a plastic cover and a plastic floor. An interface is positioned on the circuit board, for an electrical connection to at least one additional vehicle component. At least one opening is provided in the plastic cover for the electrical connection.

摘要翻译： 提供了一种控制单元以及用于组装用于车辆的个人保护装置的控制单元的方法。 电路板安装在塑料盖和塑料地板之间。 接口位于电路板上，用于与至少一个附加车辆部件的电连接。 在电气连接的塑料盖中设置至少一个开口。

公开(公告)号：US20060126414A1

公开(公告)日：2006-06-15

申请号：US11294055

申请日：2005-12-05

申请人： Richard Antretter ,  Manfred Moser

发明人： Richard Antretter ,  Manfred Moser

IPC分类号： G11C11/406 ,  G11C7/00 ,  G11C11/401

CPC分类号： G11C11/40618 ,  G11C11/406

摘要： An electronic memory device for storing data comprises a memory cell array arranged in at least one memory bank and comprising memory cells in which information is stored. The electronic memory device further comprises word lines and bit lines for addressing and reading the memory cells of the memory cell array. The word lines are configured to refresh in a refresh mode the information stored in the memory cells of the memory cell area by applying a predetermined activation potential at a predetermined refresh rate to the word lines. All word lines of the memory bank which do not have a common bit line are activated simultaneously in the refresh mode.

摘要翻译： 一种用于存储数据的电子存储器件包括布置在至少一个存储体中的存储单元阵列，并且包括存储有信息的存储单元。 电子存储装置还包括用于寻址和读取存储单元阵列的存储单元的字线和位线。 字线被配置为通过以预定的刷新率向字线施加预定的激活电位，以刷新模式刷新存储在存储单元区域的存储单元中的信息。 不具有公共位线的存储体的所有字线在刷新模式下同时被激活。

公开(公告)号：US06293454B1

公开(公告)日：2001-09-25

申请号：US09601378

申请日：2000-07-26

申请人： Yimin Zhang ,  Scott Rhoads ,  Manfred Moser ,  Jean-Luc Trenchant

发明人： Yimin Zhang ,  Scott Rhoads ,  Manfred Moser ,  Jean-Luc Trenchant

IPC分类号： B23K3704

CPC分类号： B23K37/047

摘要： An installation for positioning and welding body parts of different types of motor vehicles. The installation includes a mounting frame (5) which is guided on a conveyor line and which has receiving elements for at least some vehicle body parts. Positioning devices (8) are provided for the vehicle body parts (6) and at least one robot is provided for carrying out welding work. The invention is very flexible in terms of product modifications. The mounting frame (5) has positioning devices for at least some vehicle body parts (6) and clamping devices for the vehicle body parts. An additional (lower) conveyor line (10) is located under the first conveyor (2). One of several auxiliary mounting frames (12) is guided on the additional conveyor line. Parking positions (13) for the auxiliary mounting frames (12) are provided next to the lower conveyor line (10). The auxiliary mounting frames (12) each have receiving elements for other vehicle body parts of different types of vehicles and devices for positioning and clamping with the mounting frame (5). A lifting device (17) is also provided for the auxiliary mounting frame (12).

摘要翻译： 用于定位和焊接不同类型机动车辆的车身部件的安装。 该安装包括安装框架（5），该安装框架（5）在输送线路上被引导并且具有用于至少一些车身部件的接收元件。 为车身部件（6）提供定位装置（8），并且提供至少一个用于进行焊接作业的机器人。 本发明在产品修改方面非常灵活。 安装框架（5）具有至少一些车身部件（6）和用于车身部件的夹紧装置的定位装置。 另外（较低）的输送线（10）位于第一输送机（2）下方。 几个辅助安装框架（12）中的一个在附加输送线上被引导。 辅助安装框架（12）的停放位置（13）设置在下部输送线（10）的旁边。 辅助安装架（12）各自具有用于不同类型车辆的其他车身部件的接收元件和用于与安装框架（5）定位和夹紧的装置。 还为辅助安装框架（12）提供提升装置（17）。

公开(公告)号：US5513536A

公开(公告)日：1996-05-07

申请号：US328689

申请日：1994-10-25

申请人： Herbert Reger ,  Rudolf Heinz ,  Rainer Martin ,  Manfred Moser ,  Hans Braun

发明人： Herbert Reger ,  Rudolf Heinz ,  Rainer Martin ,  Manfred Moser ,  Hans Braun

IPC分类号： G01L1/18 ,  B25J13/08 ,  G01L5/16 ,  G01L9/08 ,  G01L3/00

CPC分类号： G01L5/162 ,  B25J13/085

摘要： A device for measuring a force, a pressure or a torque transmitted in a force path between first and second apparatus components, includes at least three mutually spaced piezo-resistive resistor elements disposed in the force path between the first and second apparatus components such that the apparatus components orthogonally stress the resistor elements.

摘要翻译： 用于测量在第一和第二装置部件之间的力路径中传递的力，压力或扭矩的装置包括设置在第一和第二装置部件之间的力路径中的至少三个互相隔开的压阻电阻元件， 器件部件正交地施加电阻元件。

公开(公告)号：US07286433B2

公开(公告)日：2007-10-23

申请号：US11294055

申请日：2005-12-05

申请人： Richard Antretter ,  Manfred Moser

发明人： Richard Antretter ,  Manfred Moser

IPC分类号： G11C7/00

CPC分类号： G11C11/40618 ,  G11C11/406

摘要： An electronic memory device for storing data comprises a memory cell array arranged in at least one memory bank and comprising memory cells in which information is stored. The electronic memory device further comprises word lines and bit lines for addressing and reading the memory cells of the memory cell array. The word lines are configured to refresh in a refresh mode the information stored in the memory cells of the memory cell area by applying a predetermined activation potential at a predetermined refresh rate to the word lines. All word lines of the memory bank which do not have a common bit line are activated simultaneously in the refresh mode.

摘要翻译： 一种用于存储数据的电子存储器件包括布置在至少一个存储体中的存储单元阵列，并且包括存储有信息的存储单元。 电子存储装置还包括用于寻址和读取存储单元阵列的存储单元的字线和位线。 字线被配置为通过以预定的刷新率向字线施加预定的激活电位，以刷新模式刷新存储在存储单元区域的存储单元中的信息。 不具有公共位线的存储体的所有字线在刷新模式下同时被激活。

公开(公告)号：US20050080892A1

公开(公告)日：2005-04-14

申请号：US10943200

申请日：2004-09-16

申请人： Manfred Moser ,  Sonja Fritze ,  Michael Pfeiffer

发明人： Manfred Moser ,  Sonja Fritze ,  Michael Pfeiffer

IPC分类号： G06F15/173 ,  G06Q10/00

CPC分类号： G06Q10/06

摘要： A method for predicting a development over time of a system quantity (WP, 41, 42, 43, 44, 6) of a system (2), to which a number of system quantities (WP, 41, 42, 43, 44, 6) are assigned, a sequence of one of the system quantities (WP, 41, 42, 43, 44, 6) in each case being characterized by at least one event, wherein a delay of the at least one event is detected. On this basis, at least one actual value (I) over time for at least one event of at least one system quantity (WP, 41, 42, 43, 44, 6) is calculated within one measurement period to be predicted. The present invention makes it possible to provide a prediction of the system (2) or of one or a plurality of system quantities (WP, 41, 42, 43, 44, 6) based on flexible measurement periods. A future development of the system (2) or of the at least one system quantity (WP, 41, 42, 43, 44, 6) may not only be estimated roughly but instead may be calculated reliably under consideration of measurable data. The method makes reliable planning for future sequences of the at least one system quantity (WP, 41, 42, 43, 44, 6) and even of the entire system (2) possible.

摘要翻译： 一种用于预测系统（2）的系统数量（WP，41,42,43,44,6）随时间推移的方法，多个系统数量（WP，41,42,43,44,6） 6）被分配，在每种情况下，系统数量（WP，41,42,43,44,6）之一的序列的特征在于至少一个事件，其中检测到所述至少一个事件的延迟。 在此基础上，在要预测的一个测量周期内计算至少一个至少一个系统数量的事件（WP，41,42,43,44,6）的实际值（I）。 本发明使得可以基于灵活的测量周期来提供系统（2）或一个或多个系统数量（WP，41,42,43,44,6）的预测。 系统（2）或至少一个系统数量（WP，41,42,43,44,6）的未来发展不仅可以大致估计，而且可以在可测量数据的考虑下可靠地计算。 该方法可以对至少一个系统数量（WP，41,42,43,44,6）甚至整个系统（2）的未来序列进行可靠的规划。

公开(公告)号：US06775795B2

公开(公告)日：2004-08-10

申请号：US09789991

申请日：2001-02-20

申请人： Andreas Doll ,  Manfred Moser ,  Achim Schramm

发明人： Andreas Doll ,  Manfred Moser ,  Achim Schramm

IPC分类号： G11C2900

CPC分类号： G11C29/56 ,  G11C11/401

摘要： A method and an apparatus for testing an SDRAM are described. The SDRAM is used as a main memory in the PC, and an additional circuit configuration is accommodated on a plug-in board and has an additional memory in the form of an SRAM and logic circuits. The method according to the invention allows the SDRAM to be tested in a module bank in the running PC to be set deliberately to a test mode. In this case the code for test mode activation is modified by a high-level language program (PASCAL) in accordance with the user requirements, is copied to the additional memory on the plug-in board, and is then called by the high-level language program using MS DOS. After activation of the selected test mode by a code programmed in Assembler, a defined jump is made back to the calling program once again. This allows the use of the test mode provided in the SDRAM in standard PCs and using standard operating systems. This greatly increases the test options for SDRAMs on standard PCs.

摘要翻译： 描述了用于测试SDRAM的方法和装置。 SDRAM用作PC中的主存储器，附加电路配置被容纳在插入板上，并且具有SRAM和逻辑电路形式的附加存储器。 根据本发明的方法允许在运行的PC中的模块组中测试SDRAM被故意地设置为测试模式。 在这种情况下，根据用户需求，通过高级语言程序（PASCAL）修改测试模式激活的代码，被复制到插件板上的附加存储器中，然后由高级别 语言程序使用MS DOS。 通过在汇编程序中编程的代码激活所选的测试模式后，定义的跳转将再次返回到调用程序。 这允许在标准PC中使用SDRAM中提供的测试模式并使用标准操作系统。 这大大增加了标准PC上SDRAM的测试选项。

公开(公告)号：US5573808A

公开(公告)日：1996-11-12

申请号：US589234

申请日：1996-01-22

申请人： Werner Gruenwald ,  Walter Roethlingshoefer ,  Ulrich Goebel ,  Ralf Haug ,  Manfred Moser ,  Annette Seibold

发明人： Werner Gruenwald ,  Walter Roethlingshoefer ,  Ulrich Goebel ,  Ralf Haug ,  Manfred Moser ,  Annette Seibold

IPC分类号： H01G4/30 ,  H01L21/48 ,  H01L23/538 ,  H05K1/09 ,  H05K1/16 ,  H05K3/20 ,  H05K3/46 ,  B05D5/12 ,  B41M3/12

CPC分类号： H05K1/162 ,  H01G4/30 ,  H01L21/4857 ,  H01L23/5383 ,  H01L2924/0002 ,  H05K1/092 ,  H05K2201/09236 ,  H05K2201/09763 ,  H05K3/207 ,  H05K3/4611 ,  H05K3/4629 ,  Y10T29/435

摘要： In a method for producing a multilayer circuit, it is possible to produce capacitor structures including electrodes and a dielectric arranged in between. By pressing the capacitor structures into a ceramic layer, it is possible to produce a high-quality capacitor inside the multilayer circuit.

摘要翻译： 在制造多层电路的方法中，可以制造包括电极和布置在其间的电介质的电容器结构。 通过将电容器结构压入陶瓷层，可以在多层电路内产生高质量的电容器。