公开(公告)号：US07286433B2

公开(公告)日：2007-10-23

申请号：US11294055

申请日：2005-12-05

申请人： Richard Antretter ,  Manfred Moser

发明人： Richard Antretter ,  Manfred Moser

IPC分类号： G11C7/00

CPC分类号： G11C11/40618 ,  G11C11/406

摘要： An electronic memory device for storing data comprises a memory cell array arranged in at least one memory bank and comprising memory cells in which information is stored. The electronic memory device further comprises word lines and bit lines for addressing and reading the memory cells of the memory cell array. The word lines are configured to refresh in a refresh mode the information stored in the memory cells of the memory cell area by applying a predetermined activation potential at a predetermined refresh rate to the word lines. All word lines of the memory bank which do not have a common bit line are activated simultaneously in the refresh mode.

摘要翻译： 一种用于存储数据的电子存储器件包括布置在至少一个存储体中的存储单元阵列，并且包括存储有信息的存储单元。 电子存储装置还包括用于寻址和读取存储单元阵列的存储单元的字线和位线。 字线被配置为通过以预定的刷新率向字线施加预定的激活电位，以刷新模式刷新存储在存储单元区域的存储单元中的信息。 不具有公共位线的存储体的所有字线在刷新模式下同时被激活。

公开(公告)号：US20050080892A1

公开(公告)日：2005-04-14

申请号：US10943200

申请日：2004-09-16

申请人： Manfred Moser ,  Sonja Fritze ,  Michael Pfeiffer

发明人： Manfred Moser ,  Sonja Fritze ,  Michael Pfeiffer

IPC分类号： G06F15/173 ,  G06Q10/00

CPC分类号： G06Q10/06

摘要： A method for predicting a development over time of a system quantity (WP, 41, 42, 43, 44, 6) of a system (2), to which a number of system quantities (WP, 41, 42, 43, 44, 6) are assigned, a sequence of one of the system quantities (WP, 41, 42, 43, 44, 6) in each case being characterized by at least one event, wherein a delay of the at least one event is detected. On this basis, at least one actual value (I) over time for at least one event of at least one system quantity (WP, 41, 42, 43, 44, 6) is calculated within one measurement period to be predicted. The present invention makes it possible to provide a prediction of the system (2) or of one or a plurality of system quantities (WP, 41, 42, 43, 44, 6) based on flexible measurement periods. A future development of the system (2) or of the at least one system quantity (WP, 41, 42, 43, 44, 6) may not only be estimated roughly but instead may be calculated reliably under consideration of measurable data. The method makes reliable planning for future sequences of the at least one system quantity (WP, 41, 42, 43, 44, 6) and even of the entire system (2) possible.

摘要翻译： 一种用于预测系统（2）的系统数量（WP，41,42,43,44,6）随时间推移的方法，多个系统数量（WP，41,42,43,44,6） 6）被分配，在每种情况下，系统数量（WP，41,42,43,44,6）之一的序列的特征在于至少一个事件，其中检测到所述至少一个事件的延迟。 在此基础上，在要预测的一个测量周期内计算至少一个至少一个系统数量的事件（WP，41,42,43,44,6）的实际值（I）。 本发明使得可以基于灵活的测量周期来提供系统（2）或一个或多个系统数量（WP，41,42,43,44,6）的预测。 系统（2）或至少一个系统数量（WP，41,42,43,44,6）的未来发展不仅可以大致估计，而且可以在可测量数据的考虑下可靠地计算。 该方法可以对至少一个系统数量（WP，41,42,43,44,6）甚至整个系统（2）的未来序列进行可靠的规划。

公开(公告)号：US06775795B2

公开(公告)日：2004-08-10

申请号：US09789991

申请日：2001-02-20

申请人： Andreas Doll ,  Manfred Moser ,  Achim Schramm

发明人： Andreas Doll ,  Manfred Moser ,  Achim Schramm

IPC分类号： G11C2900

CPC分类号： G11C29/56 ,  G11C11/401

摘要： A method and an apparatus for testing an SDRAM are described. The SDRAM is used as a main memory in the PC, and an additional circuit configuration is accommodated on a plug-in board and has an additional memory in the form of an SRAM and logic circuits. The method according to the invention allows the SDRAM to be tested in a module bank in the running PC to be set deliberately to a test mode. In this case the code for test mode activation is modified by a high-level language program (PASCAL) in accordance with the user requirements, is copied to the additional memory on the plug-in board, and is then called by the high-level language program using MS DOS. After activation of the selected test mode by a code programmed in Assembler, a defined jump is made back to the calling program once again. This allows the use of the test mode provided in the SDRAM in standard PCs and using standard operating systems. This greatly increases the test options for SDRAMs on standard PCs.

摘要翻译： 描述了用于测试SDRAM的方法和装置。 SDRAM用作PC中的主存储器，附加电路配置被容纳在插入板上，并且具有SRAM和逻辑电路形式的附加存储器。 根据本发明的方法允许在运行的PC中的模块组中测试SDRAM被故意地设置为测试模式。 在这种情况下，根据用户需求，通过高级语言程序（PASCAL）修改测试模式激活的代码，被复制到插件板上的附加存储器中，然后由高级别 语言程序使用MS DOS。 通过在汇编程序中编程的代码激活所选的测试模式后，定义的跳转将再次返回到调用程序。 这允许在标准PC中使用SDRAM中提供的测试模式并使用标准操作系统。 这大大增加了标准PC上SDRAM的测试选项。

公开(公告)号：US06703844B2

公开(公告)日：2004-03-09

申请号：US10223899

申请日：2002-08-20

申请人： Frank Adler ,  Thomas Huber ,  Manfred Moser ,  Martin Versen

发明人： Frank Adler ,  Thomas Huber ,  Manfred Moser ,  Martin Versen

IPC分类号： G01R3128

CPC分类号： G11C29/025 ,  G01R31/2801 ,  G01R31/3016 ,  G11C29/02 ,  G11C29/50 ,  G11C29/50012 ,  G11C2029/5002

摘要： Signal transit times on printed circuit boards which are equipped with all the passive components but without any active components can be determined using automatic standard test equipment composed of a standard test unit and a performance board with fittings attached thereto. In that first, using a standard routine of the test unit, a transit time is measured on the performance board from the CIF connector as far as the fitting, then a printed circuit board is plugged into the fitting location determined for it and then the sum transit time of the CIF connector is measured as far as the landing pad on the printed circuit board. By forming differences between the two measured values, the transit times on a printed circuit board can be measured with a high degree of precision with the automatic standard test equipment used in standard module testing technology.

摘要翻译： 配备有所有被动部件但没有任何有源部件的印刷电路板上的信号传递时间可以使用由标准测试单元和附接到其上的配件的性能板组成的自动标准测试设备来确定。 首先，使用测试单元的标准程序，在CIF连接器的性能板上测量运输时间至配件，然后将印刷电路板插入到为其确定的配件位置，然后总和 CIF连接器的通行时间被测量到印刷电路板上的着陆焊盘。 通过形成两个测量值之间的差异，可以使用标准模块测试技术中使用的自动标准测试设备，以高精度测量印刷电路板上的传送时间。

公开(公告)号：US5573808A

公开(公告)日：1996-11-12

申请号：US589234

申请日：1996-01-22

申请人： Werner Gruenwald ,  Walter Roethlingshoefer ,  Ulrich Goebel ,  Ralf Haug ,  Manfred Moser ,  Annette Seibold

发明人： Werner Gruenwald ,  Walter Roethlingshoefer ,  Ulrich Goebel ,  Ralf Haug ,  Manfred Moser ,  Annette Seibold

IPC分类号： H01G4/30 ,  H01L21/48 ,  H01L23/538 ,  H05K1/09 ,  H05K1/16 ,  H05K3/20 ,  H05K3/46 ,  B05D5/12 ,  B41M3/12

CPC分类号： H05K1/162 ,  H01G4/30 ,  H01L21/4857 ,  H01L23/5383 ,  H01L2924/0002 ,  H05K1/092 ,  H05K2201/09236 ,  H05K2201/09763 ,  H05K3/207 ,  H05K3/4611 ,  H05K3/4629 ,  Y10T29/435

摘要： In a method for producing a multilayer circuit, it is possible to produce capacitor structures including electrodes and a dielectric arranged in between. By pressing the capacitor structures into a ceramic layer, it is possible to produce a high-quality capacitor inside the multilayer circuit.

摘要翻译： 在制造多层电路的方法中，可以制造包括电极和布置在其间的电介质的电容器结构。 通过将电容器结构压入陶瓷层，可以在多层电路内产生高质量的电容器。

公开(公告)号：US4576112A

公开(公告)日：1986-03-18

申请号：US602677

申请日：1984-04-23

申请人： Bernhard Funger ,  Heinz Gruber ,  Werner Hartmann ,  Julius Kohnen ,  Johannes Kutz ,  Manfred Moser

发明人： Bernhard Funger ,  Heinz Gruber ,  Werner Hartmann ,  Julius Kohnen ,  Johannes Kutz ,  Manfred Moser

IPC分类号： B05C5/02 ,  B05D1/26 ,  D06B1/08 ,  D06B19/00 ,  B05C3/02

CPC分类号： D06B19/0094 ,  D06B1/08

摘要： A device for applying a treatment medium, especially in foam form, to a running web of material, especially a rug web, with an application beam extending transversely to the web of material, the application beam having a longitudinal slot, through which the treatment medium emerges onto the web of material. On the side opposite the slot an elastic cushion which presses the web of material against the sliding surface of the application beam is arranged on the back of the web of material. The cushion may be an inflatable elastic hollow body or a foam material cushion.

摘要翻译： 一种用于将特别是泡沫形式的处理介质，特别是泡沫形式的处理介质施加到横向于材料幅材延伸的施加梁的材料，特别是地毯腹板上的施加梁，所述施加梁具有纵向槽，通过该纵向槽 出现在材料网上。 在与狭槽相对的一侧上，将材料幅材压靠在施加梁的滑动表面上的弹性垫布置在材料幅材的背面。 衬垫可以是可膨胀的弹性中空体或泡沫材料垫。

公开(公告)号：US4310113A

公开(公告)日：1982-01-12

申请号：US132105

申请日：1980-03-20

申请人： Johannes Kutz ,  Manfred Moser

发明人： Johannes Kutz ,  Manfred Moser

IPC分类号： D06B3/16 ,  D06B17/02 ,  D06B3/10

CPC分类号： D06B3/16 ,  D06B17/02

摘要： In a device for the storage and reaction treatment of textile material in web form for continuous passage which includes a cylinder, a transporting device for transporting the textile material onto the surface of the cylinder in the circumferential direction thereof, a pleating device for pleating the textile material in several layers with folds parallel to the axis of the cylinder onto the top of the cylinder, a depositing device arranged underneath the cylinder, and a pulling off device for pulling the textile material off at a point following the lower crest of the cylinder in the travel direction, dissolving the folded layers, the velocities of the transporting device and the pleating device and the stroke of the pleating device are controlled such that the folded layers extend at least one-third on both sides of the upper crests of the cylinder and that the length of a folded layer from one fold to another fold is one-quarter to one-half of the cylinder circumference, and that the folded layers cover each other on at least two-thirds of their length.

摘要翻译： 在用于连续通过的用于连续通道的织物材料的储存和反应处理的装置中，包括用于将织物材料沿圆周方向传送到圆筒表面上的输送装置，用于打褶织物的打褶装置 多层材料，其平行于圆柱体的轴线折叠到圆柱体的顶部上，沉积装置布置在圆筒下方，以及拉出装置，用于在跟随圆柱体下部顶部的点处拉动织物材料 控制折叠层的行进方向，溶解折叠层，运送装置和打褶装置的速度以及打褶装置的行程，使得折叠层在圆柱体的上部顶部的两侧延伸至少三分之一， 折叠层从一个折叠到另一个折叠的长度是圆筒周长的四分之一到五分之一 折叠层的长度至少有三分之二相互覆盖。

公开(公告)号：US20140113504A1

公开(公告)日：2014-04-24

申请号：US14127722

申请日：2012-05-29

申请人： Manfred Moser

发明人： Manfred Moser

IPC分类号： H01R13/03

CPC分类号： H01R13/03 ,  H01R12/585 ,  H01R13/41

摘要： The invention relates to a press-in pin (1, 2) for an electrical press-in connection between an electronic component (3) and a substrate plate (4) with an electrical contact hole (5). The press-in pin (1, 2) has a press-in pin head (6) which has a press-in head length (1K) which is matched to a thickness (d) of the substrate plate (4). A press-in pin leg (7) extends between the electronic component (3) and the press-in pin head (6). A press-in pin collar (13) forms a transition between the press-in pin leg (7) and the press-in pin head (6) and has a locking projection (14). The press-in pin head (6) is coated with a layer (20) of a lead-free tin alloy (15). At least the press-in pin collar (13) with the locking projection (14) has an electrically insulating coating (16).

摘要翻译： 本发明涉及一种用于电子部件（3）和具有电接触孔（5）的基板（4）之间的电压连接的压入式针（1,2）。 压入销（1,2）具有压入头部头部（6），其具有与衬底板（4）的厚度（d）匹配的压入头部长度（1K）。 压入销脚（7）在电子部件（3）和压入针头（6）之间延伸。 压入销轴环（13）在压入销腿（7）和压入销头（6）之间形成过渡部，并具有锁定突起（14）。 压入针头（6）涂覆有无铅锡合金（15）的层（20）。 至少具有锁定突起（14）的压入套环（13）具有电绝缘涂层（16）。

公开(公告)号：US20090171515A1

公开(公告)日：2009-07-02

申请号：US12085749

申请日：2006-12-27

申请人： Manfred Moser ,  Hartmut Wayand

发明人： Manfred Moser ,  Hartmut Wayand

IPC分类号： H05K5/06

CPC分类号： H05K5/0213 ,  H01R13/5227

摘要： A control device module for a motor vehicle includes a control device that has a closed housing in which a first internal pressure prevails, and at least one connecting device for coupling a connecting element of an electrical cable. A closed space is defined in the coupled state between the connecting device and the connecting element, in which closed space a second internal pressure prevails. The control device also includes a pressure compensating device for adapting the first and second internal pressures to an external pressure that acts on the control device module from outside.

摘要翻译： 用于机动车辆的控制装置模块包括控制装置，该控制装置具有以第一内部压力为准的封闭壳体，以及用于联接电缆的连接元件的至少一个连接装置。 在连接装置和连接元件之间的联接状态中限定了封闭空间，其中闭合空间以第二内部压力为准。 控制装置还包括用于使第一和第二内部压力适应于从外部作用在控制装置模块上的外部压力的压力补偿装置。

公开(公告)号：US20050280410A1

公开(公告)日：2005-12-22

申请号：US11145610

申请日：2005-06-06

申请人： Manfred Moser ,  Daniel Mysliwitz ,  Erwin Thalmann

发明人： Manfred Moser ,  Daniel Mysliwitz ,  Erwin Thalmann

IPC分类号： G01R31/12 ,  G01R31/317 ,  G01R31/319

CPC分类号： G01R31/31926 ,  G01R31/31722 ,  G01R31/31907

摘要： The invention provides a test apparatus for testing a circuit unit (101) to be tested having a test system (100), a control bus (102) for transferring control data (106), an address bus (103) for transferring addressing data (107) and a data bus (104) for exchanging test data (108) between the test system (100) and the circuit unit (101) to be tested. A voltage generating device (200) connected between the test system (100) and the circuit unit (101) to be tested serves for generating a predeterminable operating voltage output signal (202, 202a-202n) for the voltage supply of the circuit unit (101) to be tested in a manner dependent on a control signal (211) that is provided by the test system (100) and fed via the control bus (102).

摘要翻译： 本发明提供了一种用于测试待测试的电路单元（101）的测试装置，该测试系统具有测试系统（100），用于传送控制数据（106）的控制总线（102），用于传送寻址数据的地址总线（103） 107）和用于在测试系统（100）和待测试的电路单元（101）之间交换测试数据（108）的数据总线（104）。 连接在测试系统（100）和待测试电路单元（101）之间的电压产生装置（200）用于产生用于电路电压供应的可预定工作电压输出信号（202,202a-202n） 单元（101），其以取决于由测试系统（100）提供并经由控制总线（102）馈送的控制信号（211）的方式被测试。