公开(公告)号：US20170336467A1

公开(公告)日：2017-11-23

申请号：US15156814

申请日：2016-05-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ricardo Pablo. Mikalo ,  Stefan Richter ,  Christian Schippel ,  Michael Zier

IPC: G01R31/26 ,  H01L27/12 ,  H01L23/528 ,  H01L23/525 ,  H01L21/84 ,  H01L27/092 ,  H01L29/78

CPC classification number: G01R31/2621 ,  G01R31/2884 ,  H01L21/84 ,  H01L23/5256 ,  H01L23/528 ,  H01L27/092 ,  H01L27/1203 ,  H01L29/78

Abstract: A test structure for a semiconductor device, comprising a device under test including a transistor, the transistor having a gate electrode, a source electrode, a drain electrode and a bulk electrode, a first fuse and a second fuse provided in series, wherein one terminal of the first fuse is connected to the gate electrode, one terminal of the second fuse is connected to the bulk electrode, the other terminal of the first fuse and the other terminal of the second fuse being connected to each other, a first input/output pad connected to the first terminal of the first fuse and to the gate electrode of the transistor, a second input/output pad connected to the first terminal of the second fuse and to the bulk electrode of the transistor, a third input/output pad connected to the second terminal of the first fuse and the second terminal of the second fuse.

公开(公告)号：US09673115B2

公开(公告)日：2017-06-06

申请号：US14933107

申请日：2015-11-05

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hans-Peter Moll ,  Dieter Lipp ,  Stefan Richter

IPC: H01L29/10 ,  H01L21/66 ,  H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L21/283

CPC classification number: H01L21/283 ,  H01L21/02488 ,  H01L22/34 ,  H01L29/0653 ,  H01L29/78

Abstract: The present disclosure provides a test structure which includes an SOI substrate having an active semiconductor layer, a buried insulating material layer, and a base substrate, wherein the active semiconductor layer is formed on the buried insulating material layer, which, in turn, is formed on the base substrate. The test structure further includes a contact which is formed on the active semiconductor layer and electrically coupled to the active semiconductor layer. Herein, the contact has a tip portion extending through the active semiconductor layer into the buried insulating material layer.

公开(公告)号：US20170133287A1

公开(公告)日：2017-05-11

申请号：US14933107

申请日：2015-11-05

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hans-Peter Moll ,  Dieter Lipp ,  Stefan Richter

IPC: H01L21/66 ,  H01L21/283 ,  H01L21/02 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L21/283 ,  H01L21/02488 ,  H01L22/34 ,  H01L29/0653 ,  H01L29/78

Abstract: The present disclosure provides a test structure which includes an SOI substrate having an active semiconductor layer, a buried insulating material layer, and a base substrate, wherein the active semiconductor layer is formed on the buried insulating material layer, which, in turn, is formed on the base substrate. The test structure further includes a contact which is formed on the active semiconductor layer and electrically coupled to the active semiconductor layer. Herein, the contact has a tip portion extending through the active semiconductor layer into the buried insulating material layer.