公开(公告)号：US11164794B2

公开(公告)日：2021-11-02

申请号：US16531114

申请日：2019-08-04

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Wei Hong ,  Liu Jiang ,  Yanping Shen

IPC: H01L29/76 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423

Abstract: A semiconductor device is provided that includes an active region above a substrate, a first gate structure, a second gate structure, a first semiconductor structure, a second semiconductor structure and a semiconductor bridge. The first gate semiconductor and the second semiconductor structure are in the active region and between the first and the second gate structures. The first semiconductor structure is adjacent to the first gate structure and a second semiconductor structure is adjacent to the second gate structure. The semiconductor bridge is in the active region electrically coupling the first and the second semiconductor structures.

公开(公告)号：US10957578B2

公开(公告)日：2021-03-23

申请号：US16146413

申请日：2018-09-28

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Wei Hong ,  Hui Zang ,  Hsien-Ching Lo ,  Zhenyu Hu ,  Liu Jiang

IPC: H01L21/762 ,  H01L27/12 ,  H01L29/78 ,  H01L21/02 ,  H01L21/311

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a single diffusion break device and methods of manufacture. The structure includes a single diffusion break structure with a fill material between sidewall spacers of the single diffusion break structure and a channel oxidation below the fill material.

公开(公告)号：US20210111065A1

公开(公告)日：2021-04-15

申请号：US16596814

申请日：2019-10-09

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Yongjun Shi ,  Wei Hong ,  Chun Yu Wong ,  Haiting Wang ,  Liu Jiang

IPC: H01L21/762 ,  H01L27/12

Abstract: A method and related structure provide a void-free dielectric over trench isolation region in an FDSOI substrate. The structure may include a first transistor including a first active gate over the substrate, a second transistor including a second active gate over the substrate, a first liner extending over the first transistor, and a second, different liner extending over the second transistor. A trench isolation region electrically isolates the first transistor from the second transistor. The trench isolation region includes a trench isolation extending into the FDSOI substrate and an inactive gate over the trench isolation. A dielectric extends over the inactive gate and in direct contact with an upper surface of the trench isolation region. The dielectric is void-free, and the liners do not extend over the trench isolation.

公开(公告)号：US11171036B2

公开(公告)日：2021-11-09

申请号：US16596814

申请日：2019-10-09

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Yongjun Shi ,  Wei Hong ,  Chun Yu Wong ,  Halting Wang ,  Liu Jiang

IPC: H01L21/762 ,  H01L27/12

Abstract: A method and related structure provide a void-free dielectric over trench isolation region in an FDSOI substrate. The structure may include a first transistor including a first active gate over the substrate, a second transistor including a second active gate over the substrate, a first liner extending over the first transistor, and a second, different liner extending over the second transistor. A trench isolation region electrically isolates the first transistor from the second transistor. The trench isolation region includes a trench isolation extending into the FDSOI substrate and an inactive gate over the trench isolation. A dielectric extends over the inactive gate and in direct contact with an upper surface of the trench isolation region. The dielectric is void-free, and the liners do not extend over the trench isolation.

公开(公告)号：US11018221B2

公开(公告)日：2021-05-25

申请号：US16538785

申请日：2019-08-12

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Chun Yu Wong ,  Haiting Wang ,  Yong Jun Shi ,  Xiaoming Yang ,  Liu Jiang

IPC: H01L29/06 ,  H01L23/66 ,  H01L21/768 ,  H01L21/764

Abstract: A semiconductor device is provided, which includes an active region, a first structure, a second gate structure, a first gate dielectric sidewall, a second gate dielectric sidewall, a first air gap region, a second air gap region and a contact structure. The active region is formed over a substrate. The first and second gate structures are formed over the active region and between the first gate structure and the second gate structure are the first gate dielectric sidewall, the first air gap region, the contact structure, the second air gap region and a second gate dielectric sidewall.