CELL LAYOUTS
    1.
    发明公开
    CELL LAYOUTS 审中-公开

    公开(公告)号:US20230268335A1

    公开(公告)日:2023-08-24

    申请号:US17679655

    申请日:2022-02-24

    CPC classification number: H01L27/0207

    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to cell layouts in semiconductor structures and methods of manufacture. A structure includes: a plurality of abutting cells each of which include transistors with gate structures having diffusion regions; a contact spanning across abutting cells of the plurality of abutting cells and contacting to the diffusion regions of separate cells of the abutting cells; and a continuous active region spanning across the plurality of abutting cells, wherein the continuous active region includes a drain-source abutment with L-shape construct, a source-source abutment with U-shape construct, and a drain-drain abutment with a filler cell located between a drain-drain abutment.

    GATE-ALL-AROUND FIELD EFFECT TRANSISTORS

    公开(公告)号:US20250040167A1

    公开(公告)日:2025-01-30

    申请号:US18225907

    申请日:2023-07-25

    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to gate-all-around field effect transistors and methods of manufacture. The structure includes: a plurality of stacked semiconductor nanosheets over a semiconductor substrate; a plurality of gate structures surrounding the plurality of semiconductor nanosheets; a conductive material between the plurality of semiconductor nanosheets and the plurality of gate structures; an inner sidewall spacer adjacent to each of the plurality of gate structures and conductive material; and source/drain regions on opposing sides of the plurality of gate structures, separated therefrom by the inner sidewall spacer.

Patent Agency Ranking