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公开(公告)号:US20230268335A1
公开(公告)日:2023-08-24
申请号:US17679655
申请日:2022-02-24
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Juhan KIM , Sangmoon J. KIM , Mahbub RASHED , Navneet K. JAIN
IPC: H01L27/02
CPC classification number: H01L27/0207
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to cell layouts in semiconductor structures and methods of manufacture. A structure includes: a plurality of abutting cells each of which include transistors with gate structures having diffusion regions; a contact spanning across abutting cells of the plurality of abutting cells and contacting to the diffusion regions of separate cells of the abutting cells; and a continuous active region spanning across the plurality of abutting cells, wherein the continuous active region includes a drain-source abutment with L-shape construct, a source-source abutment with U-shape construct, and a drain-drain abutment with a filler cell located between a drain-drain abutment.
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公开(公告)号:US20250040167A1
公开(公告)日:2025-01-30
申请号:US18225907
申请日:2023-07-25
Applicant: GlobalFoundries U.S. Inc.
Inventor: Navneet K. JAIN , Romain H. A. FEUILLETTE , David C. PRITCHARD , James P. MAZZA , Hong YU
IPC: H01L29/775 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/66
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to gate-all-around field effect transistors and methods of manufacture. The structure includes: a plurality of stacked semiconductor nanosheets over a semiconductor substrate; a plurality of gate structures surrounding the plurality of semiconductor nanosheets; a conductive material between the plurality of semiconductor nanosheets and the plurality of gate structures; an inner sidewall spacer adjacent to each of the plurality of gate structures and conductive material; and source/drain regions on opposing sides of the plurality of gate structures, separated therefrom by the inner sidewall spacer.
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公开(公告)号:US20240304616A1
公开(公告)日:2024-09-12
申请号:US18118317
申请日:2023-03-07
Applicant: GlobalFoundries U.S. Inc.
Inventor: Xuelian ZHU , Navneet K. JAIN , Juhan KIM , James P. MAZZA , Jia ZENG , David C. PRITCHARD , Mahbub RASHED
CPC classification number: H01L27/0617 , H01Q1/38 , H01Q1/48
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to antenna structures and methods of manufacture. The structure includes an antenna cell comprising a single P-well isolated by a deep trench isolation structure and including at least one diffusion region.
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公开(公告)号:US20230335484A1
公开(公告)日:2023-10-19
申请号:US17723888
申请日:2022-04-19
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: James P. MAZZA , Navneet K. JAIN , Xuelian ZHU , Jia ZENG , Mahbub RASHED
IPC: H01L23/522 , H01L23/48 , H01L23/528 , H01L23/535 , H01L21/768
CPC classification number: H01L23/5226 , H01L23/481 , H01L23/5286 , H01L23/535 , H01L21/76898
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to local interconnect power rails merged with upper power rails and methods of manufacture. The structure includes: an active cell including contacts enclosed in active regions; at least one local interconnect power rail connecting to the contacts of the active regions; and at least one power rail above and connected to the at least one local interconnect power rail.
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