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    AUTHENTICATION OF LOGIC CIRCUITRY PACKAGES
    3.
    发明申请
    AUTHENTICATION OF LOGIC CIRCUITRY PACKAGES 有权

    公开(公告)号：US20240396716A1

    公开(公告)日：2024-11-28

    申请号：US18696264

    申请日：2021-10-07

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： Stephen D. PANSHIN

    IPC: H04L9/08

    Abstract: A logic circuitry package includes a logic circuit and an interface to communicate with a host logic circuit. The logic circuit includes a memory arrangement storing an asymmetric key, and/or a certificate corresponding to the asymmetric key. The logic circuit is configured to transmit, to the host logic circuit, the certificate; receive, from the host logic circuit, a static signature request comprising challenge data; and/or, transmit, to the host logic circuit, a signature computed based on the challenge data and the asymmetric key in response to the static signature request.

    LOGIC CIRCUITRY
    8.
    发明申请
    LOGIC CIRCUITRY 有权

    公开(公告)号：US20210334392A1

    公开(公告)日：2021-10-28

    申请号：US16495248

    申请日：2018-12-03

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： Stephen D. PANSHIN ,  Jefferson P. WARD ,  Scott A. LINN ,  James Michael GARDNER

    IPC: G06F21/60 ,  G06F21/44 ,  G06F21/84 ,  B41J2/175

    Abstract: In an example, a logic circuitry package is configured to communicate with a print apparatus logic circuit. The logic circuitry package may be configured to respond to communications sent to a first address and to at least one second address. The logic circuitry package may comprise a first logic circuit, wherein the first address is an address for the first logic circuit. The package may be configured such that, in response to a first command indicative of a task and a first time period sent to the first address, the package is accessible via at least one second address for a duration of the time period.

    SUPPLY AUTHENTICATION VIA TIMING CHALLENGE RESPONSE
    9.
    发明申请
    SUPPLY AUTHENTICATION VIA TIMING CHALLENGE RESPONSE 有权
    供应认证通过时间挑战回应

    公开(公告)号：US20160214391A1

    公开(公告)日：2016-07-28

    申请号：US14913982

    申请日：2013-08-30

    Applicant: Hewlett-Packard Development Company, L.P.

    Inventor： Jefferson P. WARD ,  Stephen D. PANSHIN

    IPC: B41J2/175 ,  H04L9/32

    CPC classification number: B41J2/17546 ,  G03G15/0863 ,  G06F21/44 ,  G06F2221/2103 ,  G06F2221/2151 ,  H04L9/3271 ,  H04L63/0876

    Abstract: In an example implementation, an authentication system includes a printer having a controller and a memory. The authentication system also includes an authentication algorithm stored in the memory and executable on the controller to issue a cryptographic timing challenge, and to authenticate a print supply cartridge when the cartridge provides a challenge response corresponding to an expected response within an expected time window.

    Abstract translation: 在示例实现中，认证系统包括具有控制器和存储器的打印机。 认证系统还包括存储在存储器中并且可在控制器上执行的认证算法，以发出加密定时挑战，并且当盒提供与预期时间窗口内的预期响应相对应的质询响应时，对打印供应盒进行认证。

    LOGIC CIRCUITRY PACKAGE
    10.
    发明申请
    LOGIC CIRCUITRY PACKAGE 有权

    公开(公告)号：US20210402785A1

    公开(公告)日：2021-12-30

    申请号：US16959391

    申请日：2019-10-25

    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

    Inventor： Stephen D. PANSHIN ,  David Owen Roethig ,  James Micheal Gardner

    IPC: B41J2/175

    Abstract: A logic circuitry package for a replaceable print apparatus component includes an interface and at least one logic circuit. The at least one logic circuit is configured to respond to communications sent to a first address via the interface and respond to communications sent to a second address via the interface. The at least one logic circuit is configured to in response to a hibernate command sent to the first address, respond to communications sent to the second address.

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