Abstract:
A memory management method implemented by a requesting node includes sending first indication information used for indicating a length of memory required by the requesting node and receiving second indication information used for indicating first remote memory provided to the requesting node by a target contributing node in at least one contributing node that can provide remote memory. The method also includes determining, from available virtual addresses, a first virtual address corresponding to the first remote memory, and sending a first data read/write instruction for the first data when first data whose pointer is within a range of the first virtual address needs to be read/written, where the first data read/write instruction includes third indication information, and the third indication information is used for indicating storage space, for storing the first data, in the first remote memory.
Abstract:
A memory management method implemented by a requesting node includes sending first indication information used for indicating a length of memory required by the requesting node and receiving second indication information used for indicating first remote memory provided to the requesting node by a target contributing node in at least one contributing node that can provide remote memory. The method also includes determining, from available virtual addresses, a first virtual address corresponding to the first remote memory, and sending a first data read/write instruction for the first data when first data whose pointer is within a range of the first virtual address needs to be read/written, where the first data read/write instruction includes third indication information, and the third indication information is used for indicating storage space, for storing the first data, in the first remote memory.
Abstract:
A TLB management method and computer are provided. The method includes querying a TLB storage directory table using a VPID of a first VCPU as an index, to obtain an address of a TLB storage table corresponding to the first VCPU; then accessing, according to the address of the TLB storage table corresponding to the first VCPU, the TLB storage table corresponding to the first VCPU, and reading a valid TLB entry in the TLB storage table corresponding to the first VCPU into a physical TLB.
Abstract:
A multilevel cache-based data read/write method and a computer system. The method includes acquiring a query address of a physical memory data block in which data is to be read/written, acquiring a cache location attribute of the physical memory data block, querying whether a cache is hit until one cache is hit or all caches are missed, where the querying is performed according to the query address in descending order of levels of caches storable for the physical memory data block, and the levels of the caches are indicated by the cache location attribute, and if one cache is hit, reading/writing the data in the query address of the physical memory data block in the hit cache; or, if all caches are missed, reading/writing the data in the query address of the physical memory data block in a memory.
Abstract:
A cross-page prefetching method, apparatus, and system are disclosed, which can improve a prefetching hit ratio of a prefetching device, and further improve efficiency of memory access. The method includes: receiving an indication message, sent by a cache, that a physical address is missing, where the indication message carries a mapped-to first physical address and contiguity information of a first physical page to which the first physical address belongs; acquiring a prefetching address according to the first physical address and a step size that is stored in a prefetching device; and if a page number of a physical page to which the prefetching address belongs is different from a page number of the first physical page, and it is determined, according to the contiguity information of the first physical page, that the first physical page is contiguous, prefetching data at the prefetching address.
Abstract:
A memory segment access method and apparatus relates to the field of computer technologies, which are used to resolve a problem of a relatively low memory access bandwidth caused by relatively low utilization of bandwidth resources in a multichannel memory system. The method includes acquiring, by a first scheduler, a quantity of to-be-sent memory access requests in a second scheduler, and receiving, by the first scheduler, a memory access request, and sending the memory access request through a second memory channel corresponding to the second scheduler.
Abstract:
A memory management method implemented by a requesting node includes sending first indication information used for indicating a length of memory required by the requesting node and receiving second indication information used for indicating first remote memory provided to the requesting node by a target contributing node in at least one contributing node that can provide remote memory. The method also includes determining, from available virtual addresses, a first virtual address corresponding to the first remote memory, and sending a first data read/write instruction for the first data when first data whose pointer is within a range of the first virtual address needs to be read/written, where the first data read/write instruction includes third indication information, and the third indication information is used for indicating storage space, for storing the first data, in the first remote memory.
Abstract:
A method and an apparatus for querying a physical memory address where the method includes storing, into a prefetch buffer, page table entries of a second thread that is to perform addressing that are stored in a standby buffer, where the standby buffer stores page table entries that are not queried within a set time in a translation lookaside buffer (TLB), receiving a memory addressing request message that carries a virtual address and is sent by the second thread, and querying, in the TLB and the prefetch buffer, a corresponding physical address according to the virtual address.
Abstract:
A method and an apparatus for querying a physical memory address where the method includes storing, into a prefetch buffer, page table entries of a second thread that is to perform addressing that are stored in a standby buffer, where the standby buffer stores page table entries that are not queried within a set time in a translation lookaside buffer (TLB), receiving a memory addressing request message that carries a virtual address and is sent by the second thread, and querying, in the TLB and the prefetch buffer, a corresponding physical address according to the virtual address.
Abstract:
A multilevel cache-based data read/write method and a computer system. The method includes acquiring a query address of a physical memory data block in which data is to be read/written, acquiring a cache location attribute of the physical memory data block, querying whether a cache is hit until one cache is hit or all caches are missed, where the querying is performed according to the query address in descending order of levels of caches storable for the physical memory data block, and the levels of the caches are indicated by the cache location attribute, and if one cache is hit, reading/writing the data in the query address of the physical memory data block in the hit cache; or, if all caches are missed, reading/writing the data in the query address of the physical memory data block in a memory.